index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
x86
/
x86_traits.hh
Age
Commit message (
Expand
)
Author
2008-10-12
X86: Make APICs communicate through the memory system.
Gabe Black
2008-10-12
X86: Make the local APIC accessible through the memory system directly, and m...
Gabe Black
2008-03-25
X86: Start implementing the south bridge stuff.
Gabe Black
2008-02-26
X86: Get PCI config space to work, and adjust address space prefix numbering ...
Gabe Black
2008-01-12
X86: Make the IO ports work using extra physical address lines. Add a serial ...
Gabe Black
2007-10-18
X86: Implement the in/out instructions. These will still need support from th...
Gabe Black
2007-10-12
X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.
Gabe Black
2007-09-13
X86: Total overhaul of the division instructions and microops.
Gabe Black
2007-09-06
X86: Rework the multiplication microops so that they work like they would in ...
Gabe Black
2007-09-04
X86: Add floating point micro registers.
Gabe Black
2007-08-29
X86: Flesh out register indexing constants.
Gabe Black
2007-07-17
Add a spot for the condition code portion of the flag register.
Gabe Black
2007-06-14
Add in some microregs.
Gabe Black
2007-03-05
A new file for x86 specific parameters. This could be implemented as a sim ob...
Gabe Black