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AgeCommit message (Expand)Author
2011-09-23X86: Move the MSR lookup table out of the TLB and into its own file.Gabe Black
2011-09-19X86: Don't use "#if FULL_SYSTEM" in the X86 ISA description.Gabe Black
2011-09-19PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts.Gabe Black
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-09-09StaticInst: Merge StaticInst and StaticInstBase.Gabe Black
2011-09-09Stack: Tidy up some comments, a warning, and make stack extension consistent.Gabe Black
2011-09-05X86: Make sure instruction flags are set properly even on 32 bit machines.Gabe Black
2011-09-05X86,TLB: Make sure the "delayedResponse" variable is always set.Gabe Black
2011-09-02TLB: comments and a helpful warning.Lisa Hsu
2011-08-13X86: Use IsSquashAfter if an instruction could affect fetch translation.Gabe Black
2011-07-11X86: implements copyRegs() functionNilay Vaish
2011-07-05ISA parser: Define operand types with a ctype directly.Gabe Black
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-07-02X86: Fix store microops so they don't drop faults in timing mode.Gabe Black
2011-06-21X86: Eliminate an unused argument for building store microops.Gabe Black
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-06-02copyright: clean up copyright blocksNathan Binkert
2011-05-23config: revamp x86 config to avoid appending to SimObjectVectorsSteve Reinhardt
2011-05-13Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.Chander Sudanthi
2011-05-06X86: Fix the Lldt instructions so they load the ldtr and not the tr.Gabe Black
2011-04-23X86: When decoding a memory only inst, fault on reg encodings, don't assert.Gabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-04-04ARM: Cleanup implementation of ITSTATE and put important code in PCState.Ali Saidi
2011-03-26mips: cleanup ISA-specific codeKorey Sewell
2011-03-17O3: Send instruction back to fetch on squash to seed predecoder correctly.Ali Saidi
2011-03-02X86: Use the npc as the pc when doing a nativetrace, not what M5 considers th...Gabe Black
2011-03-02X86: Decode the mysterious and elusive ffreep x87 instruction.Gabe Black
2011-03-01Spelling: Fix the a spelling error by changing mmaped to mmapped.Gabe Black
2011-03-01X86: Mark IO reads and writes as non-speculative.Gabe Black
2011-03-01X86: Mark prefetches as such in their instruction and request flags.Gabe Black
2011-02-27X86: If PCI config space is disabled, pass through to regular IO addresses.Gabe Black
2011-02-27X86: Use regular read requests in the walker instead of read exclusive.Gabe Black
2011-02-15X86: Get rid of "inline" on the MicroPanic constructor in decoder.cc.Gabe Black
2011-02-13X86: Detect branches taking into account instruction size.Gabe Black
2011-02-13X86: Put the result used for flags in an intermediate variable.Gabe Black
2011-02-13X86: Don't read in dest regs if all bits are replaced.Gabe Black
2011-02-13X86: On a bad microopc, return a microop that returns a fault that panics.Gabe Black
2011-02-13X86: Define fault objects to carry debug messages.Gabe Black
2011-02-13X86: Only reset npc to reflect instruction length once.Gabe Black
2011-02-07X86: Obey the wp bit of CR0.Tim Harris
2011-02-07X86: Use all 64 bits of the lstar register in the SYSCALL_64 macroop.Tim Harris
2011-02-07X86: Fix JMP_FAR_I to unpack a far pointer correctly.Tim Harris
2011-02-07X86: Read the LDT/GDT at CPL0 when executing an iret.Tim Harris
2011-02-07X86: Fix compiling vtophys.ccGabe Black
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-06dev: fixed bugs to extend interrupt capability beyond 15 coresBrad Beckmann
2011-02-06x86: Timing support for pagetable walkerJoel Hestness
2011-02-06x86: Add checkpointing capability to arch componentsJoel Hestness