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AgeCommit message (Expand)Author
2016-03-17syscall_emul: rename OpenFlagTransTable structBrandon Potter
2016-02-13syscall_emul: Implement clock_getres() system callMichael LeBeane
2016-02-06x86: revamp cmpxchg8b/cmpxchg16b implementationAlexandru Dutu
2016-02-06arch, x86: add support for arrays as memory operandsSteve Reinhardt
2016-02-06syscall_emul: fix bug in aux vector initializationSteve Reinhardt
2016-02-06x86: create function to check miscreg validitySteve Reinhardt
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2016-02-06style: remove trailing whitespaceSteve Reinhardt
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2016-01-17arch: don't call *Timing functions from *Atomic versionsSteve Reinhardt
2016-01-17arch: get rid of unused LargestRead typedefSteve Reinhardt
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
2015-12-18arm: remote GDB: rationalize structure of register offsetsBoris Shingarov
2015-11-16x86: Invalidating TLB entry on page faultSwapnil Haria
2015-11-16x86: cpuid: add family to warn() messageBjoern A. Zeeb
2015-11-16x86: pagetable walker: fix typo in commentBjoern A. Zeeb
2015-10-23x86: Add missing explicit overrides for X86 devicesAndreas Hansson
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-10-09isa: Add parameter to pick different decoder inside ISARekai Gonzalez Alberquilla
2015-10-06x86: implement rcpps and rcpss SSE instsSteve Reinhardt
2015-10-06x86: implement fild, fucomi, and fucomip x87 instsSteve Reinhardt
2015-09-30cpu,isa,mem: Add per-thread wakeup logicMitch Hayenga
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-07-20x86: x86 instruction-implementation bug fixesDavid Hashe
2015-07-20syscall: Add readlink to x86 with special case /proc/self/exeDavid Hashe
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-17x86: decode instructions with vex prefixNilay Vaish
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-07-04x86: Adjust the size of the values written to the x87 misc registersNikos Nikoleris
2015-05-15misc: Appease gcc 5.1Andreas Hansson
2015-05-05syscall_emul: fix warn_once behaviorSteve Reinhardt
2015-05-05mem, cpu: Add a separate flag for strictly ordered memoryAndreas Sandberg
2015-05-05arch, cpu: Do not forward snoops to table walkerAndreas Hansson
2015-04-29x86: change divide-by-zero fault to divide-errorNilay Vaish
2015-04-24misc: Appease gcc 5.1 without moving GDB_REG_BYTESAndreas Hansson
2015-04-23misc: Appease gcc 5.1Andreas Hansson
2015-04-22syscall_emul: implement clock_gettime system callBrandon Potter
2015-04-22syscall_emul: update x86 syscall tableMonir Mozumder
2015-04-13x86: implements x87 mult/div instructionsNilay Vaish
2015-04-03x86: fix debug trace output for mwaitLena Olson
2015-03-23mem: rename Locked/LOCKED to LockedRMW/LOCKED_RMWSteve Reinhardt
2015-03-02mem: Split port retry for all different packet classesAndreas Hansson
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2015-02-11mem: Clarification of packet crossbar timingsMarco Balboni
2015-02-11sim: Move the BaseTLB to src/arch/generic/Andreas Sandberg
2015-01-25cpu: Put all CPU instruction tracers in a single fileAli Saidi
2015-01-22mem: Remove unused Packet src and dest fieldsAndreas Hansson
2015-01-22x86: Delay X86 table walk on receiving walker responseAndreas Hansson
2015-01-10x86 : fxsave and fxrestore missing template codeEmilio Castillo
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