| Age | Commit message (Expand) | Author |
|---|
| 2018-03-15 | arch-x86,sim-se: Enable prlimit syscall | Jason Lowe-Power |
| 2018-03-15 | arch-x86,sim-se: Bump kernel version to 3.2 | Jason Lowe-Power |
| 2018-03-15 | x86: Add bitfields which can gather/scatter bases and limits. | Gabe Black |
| 2018-03-14 | x86: Simplify the implementations of RDTSC and RDTSCP slightly. | Gabe Black |
| 2018-03-14 | x86: Implement the RDTSCP instruction. | Gabe Black |
| 2018-03-14 | x86: Mark the RDTSC instruction as .serialize_before. | Gabe Black |
| 2018-03-14 | x86: Replace the .serializing directive with .serialize_(before|after). | Gabe Black |
| 2018-01-31 | arch-x86: consistent style of comments in system files | Christian Menard |
| 2018-01-30 | arch-x86: Granularity bit and segment limit | Maximilian Stein |
| 2018-01-23 | arch-x86: Adding clflush, clflushopt, clwb instructions | Swapnil Haria |
| 2018-01-23 | tarch, mem: Abstract the data stored in the SE page tables. | Gabe Black |
| 2018-01-23 | x86, mem: Rewrite the multilevel page table class. | Gabe Black |
| 2018-01-20 | x86, mem: Don't try to force physical addresses on the system. | Gabe Black |
| 2018-01-20 | x86, mem: Get rid of PageTableOps::getBasePtr. | Gabe Black |
| 2018-01-20 | x86, mem: Pass the multi level page table layout in as a parameter. | Gabe Black |
| 2018-01-20 | arch, mem: Make the page table lookup function return a pointer. | Gabe Black |
| 2018-01-20 | sim, arch, base: Refactor the base remote GDB class. | Gabe Black |
| 2018-01-19 | arch, mem, sim: Consolidate and rename the SE mode page table classes. | Gabe Black |
| 2018-01-11 | arch,mem: Remove the default value for page size. | Gabe Black |
| 2018-01-11 | arch,mem: Move page table construction into the arch classes. | Gabe Black |
| 2018-01-10 | alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT. | Gabe Black |
| 2017-12-23 | alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA::NoopMachInst. | Gabe Black |
| 2017-12-23 | riscv,x86: Stop using the arch Nop machine instruction unnecessarily. | Gabe Black |
| 2017-12-22 | arch,cpu: "virtualize" the TLB interface. | Gabe Black |
| 2017-12-14 | misc: Updates for gcc7.2 for x86 | Jason Lowe-Power |
| 2017-12-14 | x86: Use operand size 4 when it would be 2 for cmpxchg8b. | Gabe Black |
| 2017-12-13 | arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with. | Gabe Black |
| 2017-12-13 | x86: Rework how "split" loads/stores are handled. | Gabe Black |
| 2017-12-08 | x86,misc: add additional info on faulting X86 instruction, fetched PC | Matt Sinclair |
| 2017-12-06 | x86: Split apart x87's FSW and TOP, and add a missing break. | Gabe Black |
| 2017-12-05 | x86: LOOP's operand size defaults to 64 bits in 64 bit mode. | Gabe Black |
| 2017-12-04 | misc: Rename misc.(hh|cc) to logging.(hh|cc) | Gabe Black |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-10-31 | x86: Fix VEX instruction decoding. | Gabe Black |
| 2017-10-17 | scons: Stop generating inc.d in the isa parser. | Gabe Black |
| 2017-10-13 | mem: Signal the local monitor when clearing the global monitor | Nikos Nikoleris |
| 2017-09-27 | arch-x86: fix CondInst decoding for MOV to Control Registers | Bjoern A. Zeeb |
| 2017-09-11 | stats: Get rid of some kernel stats related cruft. | Gabe Black |
| 2017-08-30 | arch-x86: Add missing override in the X86 TLB | Andreas Sandberg |
| 2017-08-28 | x86: Use the new CondInst format for moves to/from control registers. | Gabe Black |
| 2017-08-28 | x86: Add a "CondInst" format for conditionally decoded instructions. | Gabe Black |
| 2017-07-17 | sim, x86: Make clone a virtual function | Sean Wilson |
| 2017-07-17 | x86: Add stats to X86 TLB | Swapnil Haria |
| 2017-07-12 | mips, x86: Refactor some Event subclasses into lambdas | Sean Wilson |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
| 2017-06-20 | sim, x86: Replace EventWrapper use with EventFunctionWrapper | Sean Wilson |
| 2017-06-15 | x86: Add consistent overrides to process.hh | Sean Wilson |
