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path: root/src/arch/x86
AgeCommit message (Expand)Author
2015-01-06cpuid, x86: Revert "Enabling more features in CPUid"Gabe Black
2015-01-03x86: implements the simd128 ADDSUBPD instructionMaxime Martinasso
2014-12-05misc: Generalize GDB single stepping.Gabe Black
2014-12-05x86: Implement a remote GDB stub.Gabe Black
2014-12-04x86: Rework opcode parsing to support 3 byte opcodes properly.Gabe Black
2014-12-02x86: Clean up style in process.cc.Gabe Black
2014-11-23mem: Page Table map api modificationAlexandru Dutu
2014-11-23x86: Segment initialization to support KvmCPU in SEAlexandru Dutu
2014-11-23kvm, x86: Adding support for SE mode executionAlexandru Dutu
2014-11-23cpuid, x86: Enabling more features in CPUidAlexandru Dutu
2014-11-17x86: Fix setting segment bases in real mode.Gabe Black
2014-11-17x86: Fix some bugs in the real mode far jmp instruction.Gabe Black
2014-11-17x86: APIC: Only set deliveryStatus if our IPI is going somewhere.Gabe Black
2014-11-17x86: APIC: Fix the getRegArrayBit function.Gabe Black
2014-11-16x86: Fix the CPUID Long Mode Address Size function.Gabe Black
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-22sim: revert 6709bbcf564dNilay Vaish
2014-10-20x86: Fixes to avoid LTO warningsAndreas Hansson
2014-10-20sim: implement getdents/getdents64 in user modeMichael Adler
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-10-16arch,x86,mem: Dynamically determine the ISA for Ruby store checkAndreas Hansson
2014-06-13x86: add LongModeAddressSize function to cpuidJiuyue Ma
2014-09-27arch: Use const StaticInstPtr references where possibleAndreas Hansson
2014-09-20alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivateMitch Hayenga
2014-09-20mem: Rename Bus to XBar to better reflect its behaviourAndreas Hansson
2014-09-03x86: Flag instructions that call suspend as IsQuiesceMitch Hayenga
2014-09-03arch: Cleanup unused ISA traits constantsAndreas Hansson
2014-09-01x86: set op class of two fp instructionsNilay Vaish
2014-08-28mem: adding architectural page table support for SE modeAlexandru
2014-08-26base: Replace the internal varargs stuff with C++11 constructsAndreas Sandberg
2014-06-21x86: fix table walker assertionBinh Pham
2014-05-31style: eliminate equality tests with true and falseSteve Reinhardt
2014-05-12syscall emulation: clean up & comment SyscallReturnSteve Reinhardt
2014-05-09cpu: Add flag name printing to StaticInstAndrew Bardsley
2014-05-09arch: teach ISA parser how to split code across filesCurtis Dunham
2014-05-09arch, arm: Preserve TLB bootUncacheability when switching CPUsGeoffrey Blake
2014-05-09arch: remove inline specifiers on all inst constrs, all ISAsCurtis Dunham
2014-03-16kvm: x86: Add support for x86 INIT and STARTUP handlingAndreas Sandberg
2014-03-03x86: Setup correct TSL/TR segment attributes on INITAndreas Sandberg
2014-02-05x86: Fix x87 state transfer bugAndreas Sandberg
2014-02-02x86, kvm: Fix bug in the RFlags get and set functionsNikos Nikoleris
2014-01-27x86: use lfpimm instead of limm for fptanNilay Vaish
2014-01-27x86: implements x87 add/sub instructionsNilay Vaish
2014-01-27x86: implements fxch instruction.Nilay Vaish
2014-01-27x86: correct error in emms instruction.Nilay Vaish
2014-01-24arch: Make all register index flattening constAndreas Hansson
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2014-01-24cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...Ali Saidi
2014-01-24x86: Fix memory leak in table walkerAndreas Hansson
2013-11-26x86: Implementation of Int3 and Int_Ib in long modeChristian Menard