Age | Commit message (Collapse) | Author |
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registers, and fill out microcode disassembly.
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in place to handle this in the future.
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the operand types they expect.
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constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
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extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
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"moreBytes" which just takes a MachInst.
src/arch/x86/predecoder.cc:
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.
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though.
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up correctly.
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src/arch/x86/isa/formats/multi.isa:
Make the formats use objects to pass around output code.
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src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
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src/arch/x86/isa/main.isa:
Clean up where files are included.
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Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
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doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
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extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
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src/arch/x86/isa/decoder/one_byte_opcodes.isa:
Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
Fix the immediate size table
src/arch/x86/regfile.cc:
nextnpc is bogus
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test the stub code for instructions.
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extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
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parser as a unit.
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extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
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unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't.
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and added some comments to main.isa
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x86-centric stuff.
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extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
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seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
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rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
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sizes, and sign extend the 32-bit-acting-like-64-bit-immediates.
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