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path: root/src/arch/x86
AgeCommit message (Expand)Author
2015-07-20x86: x86 instruction-implementation bug fixesDavid Hashe
2015-07-20syscall: Add readlink to x86 with special case /proc/self/exeDavid Hashe
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-17x86: decode instructions with vex prefixNilay Vaish
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-07-04x86: Adjust the size of the values written to the x87 misc registersNikos Nikoleris
2015-05-15misc: Appease gcc 5.1Andreas Hansson
2015-05-05syscall_emul: fix warn_once behaviorSteve Reinhardt
2015-05-05mem, cpu: Add a separate flag for strictly ordered memoryAndreas Sandberg
2015-05-05arch, cpu: Do not forward snoops to table walkerAndreas Hansson
2015-04-29x86: change divide-by-zero fault to divide-errorNilay Vaish
2015-04-24misc: Appease gcc 5.1 without moving GDB_REG_BYTESAndreas Hansson
2015-04-23misc: Appease gcc 5.1Andreas Hansson
2015-04-22syscall_emul: implement clock_gettime system callBrandon Potter
2015-04-22syscall_emul: update x86 syscall tableMonir Mozumder
2015-04-13x86: implements x87 mult/div instructionsNilay Vaish
2015-04-03x86: fix debug trace output for mwaitLena Olson
2015-03-23mem: rename Locked/LOCKED to LockedRMW/LOCKED_RMWSteve Reinhardt
2015-03-02mem: Split port retry for all different packet classesAndreas Hansson
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2015-02-11mem: Clarification of packet crossbar timingsMarco Balboni
2015-02-11sim: Move the BaseTLB to src/arch/generic/Andreas Sandberg
2015-01-25cpu: Put all CPU instruction tracers in a single fileAli Saidi
2015-01-22mem: Remove unused Packet src and dest fieldsAndreas Hansson
2015-01-22x86: Delay X86 table walk on receiving walker responseAndreas Hansson
2015-01-10x86 : fxsave and fxrestore missing template codeEmilio Castillo
2015-01-06x86: Enable three bits in the FamilyModelStepping ECX CPUID bitfield.Gabe Black
2015-01-06cpuid, x86: Revert "Enabling more features in CPUid"Gabe Black
2015-01-03x86: implements the simd128 ADDSUBPD instructionMaxime Martinasso
2014-12-05misc: Generalize GDB single stepping.Gabe Black
2014-12-05x86: Implement a remote GDB stub.Gabe Black
2014-12-04x86: Rework opcode parsing to support 3 byte opcodes properly.Gabe Black
2014-12-02x86: Clean up style in process.cc.Gabe Black
2014-11-23mem: Page Table map api modificationAlexandru Dutu
2014-11-23x86: Segment initialization to support KvmCPU in SEAlexandru Dutu
2014-11-23kvm, x86: Adding support for SE mode executionAlexandru Dutu
2014-11-23cpuid, x86: Enabling more features in CPUidAlexandru Dutu
2014-11-17x86: Fix setting segment bases in real mode.Gabe Black
2014-11-17x86: Fix some bugs in the real mode far jmp instruction.Gabe Black
2014-11-17x86: APIC: Only set deliveryStatus if our IPI is going somewhere.Gabe Black
2014-11-17x86: APIC: Fix the getRegArrayBit function.Gabe Black
2014-11-16x86: Fix the CPUID Long Mode Address Size function.Gabe Black
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-22sim: revert 6709bbcf564dNilay Vaish
2014-10-20x86: Fixes to avoid LTO warningsAndreas Hansson
2014-10-20sim: implement getdents/getdents64 in user modeMichael Adler
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-10-16arch,x86,mem: Dynamically determine the ISA for Ruby store checkAndreas Hansson
2014-06-13x86: add LongModeAddressSize function to cpuidJiuyue Ma
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