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2009-02-25X86: Fix the timing mode of the page table walker.Gabe Black
2009-02-25X86: Make the X86 TLB take advantage of delayed translations, and get rid of ↵Gabe Black
the fake TLB miss faults.
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert ↵Gabe Black
the timing simple CPU to use it.
2009-02-25X86: Make the stupd microop not update registers in initiateAcc.Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-02-23X86: Pass whether an access was a read/write/fetch so faults can behave ↵Gabe Black
accordingly.
2009-02-16sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has ↵Lisa Hsu
been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
2009-02-09copyright: This file need not have had the more restrictive copyright.Nathan Binkert
2009-02-06Quell g++ 4.3 warning about operator ambiguityNathan Binkert
2009-02-01X86: All x86 fault classes now attempt to do something useful.Gabe Black
2009-02-01X86: Make the fault classes handle error codes better.Gabe Black
2009-02-01X86: Make the long mode interrupt/exception microcode handle an error code.Gabe Black
2009-02-01X86: Distinguish between hardware and software interrupts/exceptionsGabe Black
2009-02-01X86: Fix the upper bound on some ranges that were setting up the micro code ↵Gabe Black
assembler.
2009-02-01X86: Make the chks microop check for the right int descriptor type.Gabe Black
2009-02-01X86: Touch up the interrupt entering microcode.Gabe Black
2009-02-01X86: Keep track of the vector for all exceptions/faults.Gabe Black
2009-02-01X86: Fix the time keeping of the Local APIC timer.Gabe Black
2009-02-01X86: Fix the microcode for the LODS instruction.Gabe Black
2009-02-01X86: Fix some incorrect register widths.Gabe Black
2009-02-01X86: Add extended Intel MP entries correctly.Gabe Black
2009-02-01X86: Compute PCI config addresses correctly.Gabe Black
2009-02-01X86: Calculate flags based on the actual result.Gabe Black
2009-02-01X86: Set/correct some default values for x86 parameters.Gabe Black
2009-01-25X86: Implement the xadd instruction.Gabe Black
2009-01-25X86: Implement the bswap instruction.Gabe Black
2009-01-25X86: Fix a bug in the iret microcode.Gabe Black
2009-01-25X86: Make the interrupt object wake up the CPU when something becomes pending.Gabe Black
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2009-01-19tracing: Add help strings for some of the trace flagsNathan Binkert
2009-01-13SCons: centralize the Dir() workaround for newer versions of scons.Nathan Binkert
Scons bug id: 2006 M5 Bug id: 308
2009-01-06X86: Hook in the M5 pseudo insts.Gabe Black
2009-01-06X86: Autogenerate macroop generateDisassemble function.Gabe Black
2009-01-06X86: Move the function that prints memory args into the inst base class.Gabe Black
2009-01-06X86: Move the macroop class out of the isa description into C++.Gabe Black
2009-01-06X86: Change indentation on microop disassembly.Gabe Black
2008-12-07imported patch aux-fix.patchLisa Hsu
2008-12-06X86: Add add_entry back in.Gabe Black
2008-12-04This patch pulls out the auxiliary vector struct from individual ISALisa Hsu
LiveProcesses to the base LiveProcess definition so anyone can use them.
2008-11-15syscalls: fix latent brk/obreak bug.Steve Reinhardt
Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process.
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-09X86: Fix completeAcc get call.Gabe Black
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
2008-11-02Make it so that all thread contexts are registered with the System, even inLisa Hsu
SE. Process still keeps track of the tc's it owns, but registration occurs with the System, this eases the way for system-wide context Ids based on registration.
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
across the subclasses. generally make it so that member data is _cpuId and accessor functions are cpuId(). The ID val comes from the python (default -1 if none provided), and if it is -1, the index of cpuList will be given. this has passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard switch.
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. ↵Ali Saidi
Removing hwrei causes the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal call sys and thus the translation fails because the user is attempting to access a super page address. Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs. Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were removed since a great deal of manual patching would be required to only remove the hwrei change.
2008-10-16get rid of local variable that's only used in an assert so fast compilesNathan Binkert
2008-10-12X86: Set the delayed commit flag in x86 microops appropriately.Gabe Black