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path: root/src/arch/x86
AgeCommit message (Expand)Author
2014-08-28mem: adding architectural page table support for SE modeAlexandru
2014-08-26base: Replace the internal varargs stuff with C++11 constructsAndreas Sandberg
2014-06-21x86: fix table walker assertionBinh Pham
2014-05-31style: eliminate equality tests with true and falseSteve Reinhardt
2014-05-12syscall emulation: clean up & comment SyscallReturnSteve Reinhardt
2014-05-09cpu: Add flag name printing to StaticInstAndrew Bardsley
2014-05-09arch: teach ISA parser how to split code across filesCurtis Dunham
2014-05-09arch, arm: Preserve TLB bootUncacheability when switching CPUsGeoffrey Blake
2014-05-09arch: remove inline specifiers on all inst constrs, all ISAsCurtis Dunham
2014-03-16kvm: x86: Add support for x86 INIT and STARTUP handlingAndreas Sandberg
2014-03-03x86: Setup correct TSL/TR segment attributes on INITAndreas Sandberg
2014-02-05x86: Fix x87 state transfer bugAndreas Sandberg
2014-02-02x86, kvm: Fix bug in the RFlags get and set functionsNikos Nikoleris
2014-01-27x86: use lfpimm instead of limm for fptanNilay Vaish
2014-01-27x86: implements x87 add/sub instructionsNilay Vaish
2014-01-27x86: implements fxch instruction.Nilay Vaish
2014-01-27x86: correct error in emms instruction.Nilay Vaish
2014-01-24arch: Make all register index flattening constAndreas Hansson
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2014-01-24cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...Ali Saidi
2014-01-24x86: Fix memory leak in table walkerAndreas Hansson
2013-11-26x86: Implementation of Int3 and Int_Ib in long modeChristian Menard
2013-10-15arch/x86: add support for explicit CC register fileYasuko Eckert
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15isa: clean up register constantsSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-10-15mem: Use a flag instead of address bit 63 for generic IPRsAndreas Sandberg
2013-10-07x86: enables lstat and readlink syscallsNilay Vaish
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
2013-09-30arch: Add support for m5ops using mmapped IPRsAndreas Sandberg
2013-09-30x86: Add support for FXSAVE, FXSAVE64, FXRSTOR, and FXRSTOR64Andreas Sandberg
2013-09-30x86: Add support for FLDENV & FNSTENVAndreas Sandberg
2013-09-30x86: Add support for loading 32-bit and 80-bit floats in the x87Andreas Sandberg
2013-09-30x86: Fix re-entrancy problems in x87 store instructionsAndreas Sandberg
2013-09-30x86: Add support routines to load and store 80-bit floatsAndreas Sandberg
2013-09-30x86: Add limited support for extracting function call argumentsAndreas Sandberg
2013-09-19x86: Add support routines to convert between x87 tag formatsAndreas Sandberg
2013-09-18x86: Expose the raw hash map of MSRsAndreas Sandberg
2013-09-18x86: Add support for checking the raw state of an interruptAndreas Sandberg
2013-09-18x86: Expose the interrupt vector in faultsAndreas Sandberg
2013-08-07x86: add tlb checkpointingNilay Vaish
2013-07-11dev: make BasicPioDevice take size in constructorSteve Reinhardt
2013-07-11dev: consistently end device classes in 'Device'Steve Reinhardt
2013-07-11devices: make more classes derive from BasicPioDeviceSteve Reinhardt
2013-06-18x86: Add support for maintaining the x87 tag wordAndreas Sandberg
2013-06-18x86: Fix loading of floating point constantsAndreas Sandberg
2013-06-18x86: Initialize the MXCSR registerAndreas Sandberg
2013-06-18x86: Make the boot state VMX compliantAndreas Sandberg
2013-06-18x86: Make fprem like the fprem on a real x87Andreas Sandberg
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