summaryrefslogtreecommitdiff
path: root/src/arch/x86
AgeCommit message (Expand)Author
2013-02-19x86: Move APIC clock divider to PythonAndreas Hansson
2013-02-19mem: Add predecessor to SenderState base classAndreas Hansson
2013-02-15sim: Add a system-global option to bypass cachesAndreas Sandberg
2013-01-22x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switchNilay Vaish
2013-01-15x86 cpuid: enable clflushNilay Vaish
2013-01-15x86: implements fsin, fcos instructionsNilay Vaish
2013-01-15x86: implements emms instructionNilay Vaish
2013-01-15x86: implement fabs, fchs instructionsNilay Vaish
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-08util: add m5_fail op.Lluís Vilanova
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2013-01-07arch: Add support for invalidating TLBs when drainingAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2013-01-07o3: Fix issue with LLSC ordering and speculationAli Saidi
2013-01-04Decoder: Remove the thread context get/set from the decoder.Gabe Black
2013-01-04X86: Move address based decode caching in front of the predecoder.Gabe Black
2012-12-30x86: implement x87 fp instruction fnstswNilay Vaish
2012-12-30x86: implement x87 fp instruction fsincosNilay Vaish
2012-11-02sim: Include object header files in SWIG interfacesAndreas Sandberg
2012-11-02ISA: generic Linux thread info supportDam Sunwoo
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-10-15Checkpoint: Make system serialize call childrenAndreas Hansson
2012-09-19AddrRange: Transition from Range<T> to AddrRangeAndreas Hansson
2012-09-11X86: make use of register predicationNilay Vaish
2012-09-11x86: Add a separate register for D flag bitNilay Vaish
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
2012-08-22Packet: Remove NACKs from packet and its use in endpointsAndreas Hansson
2012-08-21Device: Remove overloaded pio_latency parameterAndreas Hansson
2012-08-21Clock: Move the clock and related functions to ClockedObjectAndreas Hansson
2012-08-15sysemul: bump all linux versions of for syscal emulation to 3.0.Ali Saidi
2012-08-06syscall emulation: Enabled getrlimit and getrusage for x86.Marc Orr
2012-08-06syscall emulation: Clean up ioctl handling, and implement for x86.Marc Orr
2012-07-22X86 CPUID: Return false if unknown processor familyNilay Vaish
2012-07-11x86: added page size in bytes tlb entry functionBrad Beckmann
2012-07-10syscall emulation: Add the futex system call.Marc Orr
2012-07-10x86: logSize and lruSeq are now optional ckpt paramsBrad Beckmann
2012-07-09Port: Make getAddrRanges constAndreas Hansson
2012-06-07X86 TLB: Add a missing = signNilay Vaish
2012-06-07X86 TLB: Fix for gcc 4.4.3Jayneel Gandhi
2012-06-05ISA: Back-out NoopMachInst as a StaticInstPtr change.Ali Saidi
2012-06-05O3: Clean up the O3 structures and try to pack them a bit better.Ali Saidi
2012-06-05sim: Remove FastAllocAli Saidi
2012-06-04ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.Gabe Black
2012-06-04X86: Ensure that the CPUID instruction always writes its outputs.Gabe Black
2012-06-04X86: Ensure that the decoder's internal ExtMachInst is completely initialized.Gabe Black
2012-05-28X86: Use the HandyM5Reg to avoid a register read and some logic in the TLB.Gabe Black
2012-05-27X86: Move the GDT down to where it can be accessed in 32 bit mode.Gabe Black
2012-05-27X86: Truncate addresses to 32 bits except in 64 bit mode, not long mode.Gabe Black
2012-05-26ISA,CPU: Generalize and split out the components of the decode cache.Gabe Black
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-08 21:05:02 +0000