gem5 - gem5

Age	Commit message (Expand)	Author
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-10-15	Checkpoint: Make system serialize call children	Andreas Hansson
2012-09-19	AddrRange: Transition from Range<T> to AddrRange	Andreas Hansson
2012-09-11	X86: make use of register predication	Nilay Vaish
2012-09-11	x86: Add a separate register for D flag bit	Nilay Vaish
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-08-28	Clock: Rework clocks to avoid tick-to-cycle transformations	Andreas Hansson
2012-08-22	Packet: Remove NACKs from packet and its use in endpoints	Andreas Hansson
2012-08-21	Device: Remove overloaded pio_latency parameter	Andreas Hansson
2012-08-21	Clock: Move the clock and related functions to ClockedObject	Andreas Hansson
2012-08-15	sysemul: bump all linux versions of for syscal emulation to 3.0.	Ali Saidi
2012-08-06	syscall emulation: Enabled getrlimit and getrusage for x86.	Marc Orr
2012-08-06	syscall emulation: Clean up ioctl handling, and implement for x86.	Marc Orr
2012-07-22	X86 CPUID: Return false if unknown processor family	Nilay Vaish
2012-07-11	x86: added page size in bytes tlb entry function	Brad Beckmann
2012-07-10	syscall emulation: Add the futex system call.	Marc Orr
2012-07-10	x86: logSize and lruSeq are now optional ckpt params	Brad Beckmann
2012-07-09	Port: Make getAddrRanges const	Andreas Hansson
2012-06-07	X86 TLB: Add a missing = sign	Nilay Vaish
2012-06-07	X86 TLB: Fix for gcc 4.4.3	Jayneel Gandhi
2012-06-05	ISA: Back-out NoopMachInst as a StaticInstPtr change.	Ali Saidi
2012-06-05	O3: Clean up the O3 structures and try to pack them a bit better.	Ali Saidi
2012-06-05	sim: Remove FastAlloc	Ali Saidi
2012-06-04	ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.	Gabe Black
2012-06-04	X86: Ensure that the CPUID instruction always writes its outputs.	Gabe Black
2012-06-04	X86: Ensure that the decoder's internal ExtMachInst is completely initialized.	Gabe Black
2012-05-28	X86: Use the HandyM5Reg to avoid a register read and some logic in the TLB.	Gabe Black
2012-05-27	X86: Move the GDT down to where it can be accessed in 32 bit mode.	Gabe Black
2012-05-27	X86: Truncate addresses to 32 bits except in 64 bit mode, not long mode.	Gabe Black
2012-05-26	ISA,CPU: Generalize and split out the components of the decode cache.	Gabe Black
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
2012-05-25	ISA: Make the decode function part of the ISA's decoder.	Gabe Black
2012-05-25	Decode: Make the Decoder class defined per ISA.	Gabe Black
2012-05-22	X86: Split Condition Code register	Nilay Vaish
2012-05-19	x86 ISA: Implement the sse3 haddps instruction.	Marc Orr
2012-05-01	MEM: Separate requests and responses for timing accesses	Andreas Hansson
2012-04-29	X86: Fix the IMUL_R_P_I macroop.	Gabe Black
2012-04-29	X86: Fix up the open system call's flags.	Vince Weaver
2012-04-29	X86: Make gem5 ignore a bunch of syscalls.	Vince Weaver
2012-04-24	X86: Clear out duplicate TLB entries when adding a new one.	Gabe Black
2012-04-23	ISA: Put parser generated files in a "generated" directory.	Gabe Black
2012-04-21	X86: Report an error if there's no kernel object, don't blindly use it.	Gabe Black
2012-04-15	X86: Fix a tiny typo in the load/store microop constructor.	Gabe Black
2012-04-14	X86: Use the AddrTrie class to implement the TLB.	Gabe Black
2012-04-14	MEM: Remove the Broadcast destination from the packet	Andreas Hansson
2012-04-14	MEM: Separate snoops and normal memory requests/responses	Andreas Hansson
2012-04-14	clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6	Andreas Hansson
2012-03-31	X86: Fix address size handling so real mode works properly.	Gabe Black
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-03-19	gcc: Clean-up of non-C++0x compliant code, first steps	Andreas Hansson