gem5 - gem5

Age	Commit message (Collapse)	Author
2009-02-25	X86: Add a check to chks to verify a task state segment descriptor.	Gabe Black

2009-02-25	X86: Add a check to chks which raises #GP(selector) if selector is NULL or ↵	Gabe Black
	not in the GDT.
2009-02-25	X86: Add makeAtomicResponse to the read/write functions of x86 devices.	Gabe Black

2009-02-25	X86: Fix the timing mode of the page table walker.	Gabe Black

2009-02-25	X86: Make the X86 TLB take advantage of delayed translations, and get rid of ↵	Gabe Black
	the fake TLB miss faults.
2009-02-25	CPU: Implement translateTiming which defers to translateAtomic, and convert ↵	Gabe Black
	the timing simple CPU to use it.
2009-02-25	X86: Make the stupd microop not update registers in initiateAcc.	Gabe Black

2009-02-25	ISA: Replace the translate functions in the TLBs with translateAtomic.	Gabe Black

2009-02-25	CPU: Get rid of translate... functions from various interface classes.	Gabe Black

2009-02-23	X86: Pass whether an access was a read/write/fetch so faults can behave ↵	Gabe Black
	accordingly.
2009-02-16	sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has ↵	Lisa Hsu
	been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
2009-02-09	copyright: This file need not have had the more restrictive copyright.	Nathan Binkert

2009-02-06	Quell g++ 4.3 warning about operator ambiguity	Nathan Binkert

2009-02-01	X86: All x86 fault classes now attempt to do something useful.	Gabe Black

2009-02-01	X86: Make the fault classes handle error codes better.	Gabe Black

2009-02-01	X86: Make the long mode interrupt/exception microcode handle an error code.	Gabe Black

2009-02-01	X86: Distinguish between hardware and software interrupts/exceptions	Gabe Black

2009-02-01	X86: Fix the upper bound on some ranges that were setting up the micro code ↵	Gabe Black
	assembler.
2009-02-01	X86: Make the chks microop check for the right int descriptor type.	Gabe Black

2009-02-01	X86: Touch up the interrupt entering microcode.	Gabe Black

2009-02-01	X86: Keep track of the vector for all exceptions/faults.	Gabe Black

2009-02-01	X86: Fix the time keeping of the Local APIC timer.	Gabe Black

2009-02-01	X86: Fix the microcode for the LODS instruction.	Gabe Black

2009-02-01	X86: Fix some incorrect register widths.	Gabe Black

2009-02-01	X86: Add extended Intel MP entries correctly.	Gabe Black

2009-02-01	X86: Compute PCI config addresses correctly.	Gabe Black

2009-02-01	X86: Calculate flags based on the actual result.	Gabe Black

2009-02-01	X86: Set/correct some default values for x86 parameters.	Gabe Black

2009-01-25	X86: Implement the xadd instruction.	Gabe Black

2009-01-25	X86: Implement the bswap instruction.	Gabe Black

2009-01-25	X86: Fix a bug in the iret microcode.	Gabe Black

2009-01-25	X86: Make the interrupt object wake up the CPU when something becomes pending.	Gabe Black

2009-01-25	CPU: Add a setCPU function to the interrupt objects.	Gabe Black

2009-01-19	tracing: Add help strings for some of the trace flags	Nathan Binkert

2009-01-13	SCons: centralize the Dir() workaround for newer versions of scons.	Nathan Binkert
	Scons bug id: 2006 M5 Bug id: 308
2009-01-06	X86: Hook in the M5 pseudo insts.	Gabe Black

2009-01-06	X86: Autogenerate macroop generateDisassemble function.	Gabe Black

2009-01-06	X86: Move the function that prints memory args into the inst base class.	Gabe Black

2009-01-06	X86: Move the macroop class out of the isa description into C++.	Gabe Black

2009-01-06	X86: Change indentation on microop disassembly.	Gabe Black

2008-12-07	imported patch aux-fix.patch	Lisa Hsu

2008-12-06	X86: Add add_entry back in.	Gabe Black

2008-12-04	This patch pulls out the auxiliary vector struct from individual ISA	Lisa Hsu
	LiveProcesses to the base LiveProcess definition so anyone can use them.
2008-11-15	syscalls: fix latent brk/obreak bug.	Steve Reinhardt
	Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process.
2008-11-10	mem: update stuff for changes to Packet and Request	Nathan Binkert

2008-11-09	X86: Fix completeAcc get call.	Gabe Black

2008-11-02	Add in Context IDs to the simulator. From now on, cpuId is almost never used,	Lisa Hsu
	the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
2008-11-02	Make it so that all thread contexts are registered with the System, even in	Lisa Hsu
	SE. Process still keeps track of the tc's it owns, but registration occurs with the System, this eases the way for system-wide context Ids based on registration.
2008-11-02	make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered	Lisa Hsu
	across the subclasses. generally make it so that member data is _cpuId and accessor functions are cpuId(). The ID val comes from the python (default -1 if none provided), and if it is -1, the index of cpuList will be given. this has passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard switch.
2008-10-21	style: Use the correct m5 style for things relating to interrupts.	Nathan Binkert