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AgeCommit message (Expand)Author
2009-02-01X86: Calculate flags based on the actual result.Gabe Black
2009-02-01X86: Set/correct some default values for x86 parameters.Gabe Black
2009-01-25X86: Implement the xadd instruction.Gabe Black
2009-01-25X86: Implement the bswap instruction.Gabe Black
2009-01-25X86: Fix a bug in the iret microcode.Gabe Black
2009-01-25X86: Make the interrupt object wake up the CPU when something becomes pending.Gabe Black
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2009-01-19tracing: Add help strings for some of the trace flagsNathan Binkert
2009-01-13SCons: centralize the Dir() workaround for newer versions of scons.Nathan Binkert
2009-01-06X86: Hook in the M5 pseudo insts.Gabe Black
2009-01-06X86: Autogenerate macroop generateDisassemble function.Gabe Black
2009-01-06X86: Move the function that prints memory args into the inst base class.Gabe Black
2009-01-06X86: Move the macroop class out of the isa description into C++.Gabe Black
2009-01-06X86: Change indentation on microop disassembly.Gabe Black
2008-12-07imported patch aux-fix.patchLisa Hsu
2008-12-06X86: Add add_entry back in.Gabe Black
2008-12-04This patch pulls out the auxiliary vector struct from individual ISALisa Hsu
2008-11-15syscalls: fix latent brk/obreak bug.Steve Reinhardt
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-09X86: Fix completeAcc get call.Gabe Black
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02Make it so that all thread contexts are registered with the System, even inLisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-16get rid of local variable that's only used in an assert so fast compilesNathan Binkert
2008-10-12X86: Set the delayed commit flag in x86 microops appropriately.Gabe Black
2008-10-12X86: Make the local APIC timer event generate an interrupt.Gabe Black
2008-10-12X86: Implement the EOI register in the local APIC.Gabe Black
2008-10-12X86: Add some DPRINTFs to the local APIC.Gabe Black
2008-10-12X86: Fix the segment setting code in IRET, and make it restore the flags.Gabe Black
2008-10-12X86: Panic when an unimplemented fault is invoked, rather than spinning foreverGabe Black
2008-10-12X86: Implement the swapgs instruction.Gabe Black
2008-10-12X86: Add wrval/rdval microops for reading significant miscregs.Gabe Black
2008-10-12X86: Make the x86 interrupt fault kick off the interrupt microcode.Gabe Black
2008-10-12X86: Implement entering an interrupt in microcode.Gabe Black
2008-10-12X86: Make sure register microops set fault rather than returning one.Gabe Black
2008-10-12X86: Implement an wrdh microop which loads bases/offsets from 16 byte descrip...Gabe Black
2008-10-12X86: Implement local labels for the ROM that actually refer into the ROM.Gabe Black
2008-10-12X86: Implement the chks check of interrupt gate target code segments.Gabe Black
2008-10-12X86: Add a check type for interrupt gates.Gabe Black
2008-10-12X86: Fix chks checking the submode for stack segments.Gabe Black
2008-10-12X86: Let segment manipulation microops be conditional.Gabe Black
2008-10-12X86: Let the microassembler know about the microcode only H segment.Gabe Black
2008-10-12X86: Fix the rdbase microopGabe Black
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-12X86: Create a handy way to access labels from the ROM in microcode.Gabe Black
2008-10-12X86: Make X86's microcode ROM actually do something.Gabe Black
2008-10-12CPU: Create a microcode ROM object in the CPU which is defined by the ISA.Gabe Black
2008-10-12X86: Create an eret microop which returns from ROM to combinational decoding.Gabe Black
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