Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-07-08 | Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. | Gabe Black | |
2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black | |
This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh | |||
2009-07-08 | Registers: Eliminate the ISA defined RegFile class. | Gabe Black | |
2009-07-08 | Registers: Move the PCs out of the ISAs and into the CPUs. | Gabe Black | |
2009-07-08 | X86: Phase out x86's intregfile.hh. | Gabe Black | |
2009-07-08 | Registers: Eliminate the ISA defined integer register file. | Gabe Black | |
2009-07-08 | Registers: Eliminate the ISA defined floating point register file. | Gabe Black | |
2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black | |
2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black | |
This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. | |||
2009-07-08 | X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended. | Gabe Black | |
2009-05-28 | X86: Keep track of more descriptor state to accomodate KVM. | Gabe Black | |
2009-05-26 | X86: Really set up the GDT and various hidden/visible segment registers. | Gabe Black | |
2009-05-17 | includes: sort includes again | Nathan Binkert | |
2009-05-17 | includes: use base/types.hh not inttypes.h or stdint.h | Nathan Binkert | |
2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert | |
--HG-- rename : src/sim/host.hh => src/base/types.hh | |||
2009-04-26 | X86: Precompute the default and alternate address and operand size and the ↵ | Gabe Black | |
stack size. | |||
2009-04-26 | X86: Split out the internal memory space from the regular translate() and ↵ | Gabe Black | |
precompute mode. | |||
2009-04-26 | X86: Centralize updates to the handy M5 reg. | Gabe Black | |
2009-04-26 | X86: Tell the function that sends int messages who to send to instead of ↵ | Gabe Black | |
figuring it out itself. | |||
2009-04-26 | X86: Make the local APICs register themselves with the IO APIC. | Gabe Black | |
This is a hack so that the IO APIC can figure out information about the local APICs. The local APICs still have no way to find out about each other. Ideally, when the local APICs update state that's relevant to somebody else, they'd send an update to everyone. Without being able to do a broadcast, that would still require knowing who else there is to notify. Other broadcasts are implemented using assumptions that may not always be true. | |||
2009-04-26 | X86: Record the initial APIC ID which identifies an APIC in M5. | Gabe Black | |
The ID as exposed to software can be changed. Tracking those changes in M5 would be cumbersome, especially since there's no guarantee the IDs will remain unique. | |||
2009-04-23 | X86: Put the StoreCheck flag with the others, and don't collide with other ↵ | Gabe Black | |
flags. | |||
2009-04-21 | syscall: Resolve conflicts between m5threads and Gabe's recent SE changes. | Steve Reinhardt | |
2009-04-21 | Commit m5threads package. | Daniel Sanchez | |
This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC. | |||
2009-04-19 | X86: Fix the functions that manipulate large bit arrays in the local APIC. | Gabe Black | |
2009-04-19 | X86: Fix up a copyright. | Gabe Black | |
2009-04-19 | X86: Fix how the TLB handles the storecheck flag. | Gabe Black | |
2009-04-19 | X86: Recognize and handle the lock legacy prefix. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of XADD. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of BTC. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of BTR. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of CMPXCHG. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of BTS. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of DEC. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of INC. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of NEG. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of NOT. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of XCHG. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of XOR. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of SUB. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of AND. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of SBB. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of ADC. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of OR. | Gabe Black | |
2009-04-19 | X86: Implement a locking version of ADD. | Gabe Black | |
2009-04-19 | X86: Implement the stul microop. | Gabe Black | |
This microop does a store and unlocks the requested address. The RISC86 microop ISA doesn't seem to have an equivalent to this, so I'm guessing that the store following an ldstl is automatically unlocking. We don't do it this way for performance reasons since the behavior is the same. | |||
2009-04-19 | X86: Implement the ldstl microop. | Gabe Black | |
This microop does a load, checks that a store would succeed, and locks the requested address. | |||
2009-04-19 | SE mode: Make keeping track of the number of syscalls less hacky. | Gabe Black | |
2009-04-19 | X86: Actually handle 16 bit mode modrm. | Gabe Black | |
2009-04-19 | X86: Make the TEST instruction set all the flags it's supposed to. | Gabe Black | |