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2009-07-19CPU: Separate out native trace into ISA (in)dependent code and SimObjects.Gabe Black
--HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-19X86: Move a displaced comment back to where it goes.Gabe Black
2009-07-19X86: Add some misc registers for FP control state.Gabe Black
2009-07-17X86: Set up a named constant for the "fold bit" for int register indices.Gabe Black
2009-07-17X86: Tame the wilds of def operands.Gabe Black
2009-07-17X86: Shift some register flattening work into the decoder.Gabe Black
2009-07-16X86: Add range checks for miscreg indexing utility functions.Gabe Black
2009-07-16X86: Take limitted advantage of the compilers type checking for microop ↵Gabe Black
operands.
2009-07-16X86: Fix a number of places where the wrong form of a microop was used.Gabe Black
2009-07-16X86: Fix x87 stack register indexing.Gabe Black
2009-07-09X86: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Registers: Add a registers.hh file as an ISA switched header.Gabe Black
This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08Registers: Eliminate the ISA defined RegFile class.Gabe Black
2009-07-08Registers: Move the PCs out of the ISAs and into the CPUs.Gabe Black
2009-07-08X86: Phase out x86's intregfile.hh.Gabe Black
2009-07-08Registers: Eliminate the ISA defined integer register file.Gabe Black
2009-07-08Registers: Eliminate the ISA defined floating point register file.Gabe Black
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black
This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-07-08X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.Gabe Black
2009-05-28X86: Keep track of more descriptor state to accomodate KVM.Gabe Black
2009-05-26X86: Really set up the GDT and various hidden/visible segment registers.Gabe Black
2009-05-17includes: sort includes againNathan Binkert
2009-05-17includes: use base/types.hh not inttypes.h or stdint.hNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
--HG-- rename : src/sim/host.hh => src/base/types.hh
2009-04-26X86: Precompute the default and alternate address and operand size and the ↵Gabe Black
stack size.
2009-04-26X86: Split out the internal memory space from the regular translate() and ↵Gabe Black
precompute mode.
2009-04-26X86: Centralize updates to the handy M5 reg.Gabe Black
2009-04-26X86: Tell the function that sends int messages who to send to instead of ↵Gabe Black
figuring it out itself.
2009-04-26X86: Make the local APICs register themselves with the IO APIC.Gabe Black
This is a hack so that the IO APIC can figure out information about the local APICs. The local APICs still have no way to find out about each other. Ideally, when the local APICs update state that's relevant to somebody else, they'd send an update to everyone. Without being able to do a broadcast, that would still require knowing who else there is to notify. Other broadcasts are implemented using assumptions that may not always be true.
2009-04-26X86: Record the initial APIC ID which identifies an APIC in M5.Gabe Black
The ID as exposed to software can be changed. Tracking those changes in M5 would be cumbersome, especially since there's no guarantee the IDs will remain unique.
2009-04-23X86: Put the StoreCheck flag with the others, and don't collide with other ↵Gabe Black
flags.
2009-04-21syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.Steve Reinhardt
2009-04-21Commit m5threads package.Daniel Sanchez
This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC.
2009-04-19X86: Fix the functions that manipulate large bit arrays in the local APIC.Gabe Black
2009-04-19X86: Fix up a copyright.Gabe Black
2009-04-19X86: Fix how the TLB handles the storecheck flag.Gabe Black
2009-04-19X86: Recognize and handle the lock legacy prefix.Gabe Black
2009-04-19X86: Implement a locking version of XADD.Gabe Black
2009-04-19X86: Implement a locking version of BTC.Gabe Black
2009-04-19X86: Implement a locking version of BTR.Gabe Black
2009-04-19X86: Implement a locking version of CMPXCHG.Gabe Black
2009-04-19X86: Implement a locking version of BTS.Gabe Black
2009-04-19X86: Implement a locking version of DEC.Gabe Black
2009-04-19X86: Implement a locking version of INC.Gabe Black
2009-04-19X86: Implement a locking version of NEG.Gabe Black
2009-04-19X86: Implement a locking version of NOT.Gabe Black
2009-04-19X86: Implement a locking version of XCHG.Gabe Black
2009-04-19X86: Implement a locking version of XOR.Gabe Black