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scheme.
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This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.
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be done.
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port.
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test instructions.
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immediate where they should use a register.
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segmentation RIPS.
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statement.
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control register work.
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set zext if the sign bit is 0.
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Also some bug fixes in MIPS ISA uncovered by g++ warnings
(Python string compares don't work in C++!).
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