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path: root/src/arch/x86
AgeCommit message (Expand)Author
2019-05-29sim-se: add a release parameter to Process.pyCiro Santilli
2019-05-29arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods.Gabe Black
2019-05-22sim-se: remove comment for code that movedBrandon Potter
2019-05-21sim-se: change syscall function signatureBrandon Potter
2019-05-20x86: Add an object file loader for linux.Gabe Black
2019-05-07x86: Mark translation as delayed in case of a hw page table walkGabor Dozsa
2019-05-03sim-se: add eventfd system callBrandon Potter
2019-04-30arch: Stop using TheISA within the ISAs.Gabe Black
2019-04-30x86: Get rid of some unnecessary TheISA-es in x86.Gabe Black
2019-04-28arch, sim: Simplify the AuxVector type.Gabe Black
2019-04-28mem: Remove the ISA specialized versions of port proxy's read/write.Gabe Black
2019-04-28mem: Minimize the use of MemObject.Gabe Black
2019-04-25x86: Refactor the ProcessInfo constructor.Gabe Black
2019-04-25x86: Fix some style issues in stacktrace.cc.Gabe Black
2019-04-22sim-se: Enhance clone for X86KvmCPUAlexandru Dutu
2019-03-19arch, cpu, dev, gpu, mem, sim, python: start using getPort.Gabe Black
2019-03-01mem-cache: alias to mem::getMasterPort in TLB classAndrea Mondelli
2019-02-20x86: Call the base class's regStats in X86ISA::TLBBagus Hanindhito
2019-02-12python: Replace dict.has_key with 'key in dict'Andreas Sandberg
2019-02-12python: Don't assume SimObjects live in the global namespaceAndreas Sandberg
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31x86: Stop using/defining some ISA specific register types.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-24base: arch: Get rid of the now unused FloatRegVal type.Gabe Black
2019-01-22sim-se add readv and modifies writevBrandon Potter
2019-01-22sim-se: add ability to get/set sock metadataBrandon Potter
2019-01-22sim-se: add syscalls related to pollingBrandon Potter
2019-01-22sim-se: add calls for network transmissionsBrandon Potter
2019-01-22sim-se: add socket-based functionalityBrandon Potter
2019-01-16arch: Make the ISA register types aliases for the global types.Gabe Black
2019-01-10sim-se: Refactor clone to avoid most ifdefsAndreas Sandberg
2018-12-05arch-x86: Add sys/syscall.h to x86 process.cc/syscall_emul.ccTony Gutierrez
2018-11-27sim-se: only implement getdentsFunc on supported hostsCiro Santilli
2018-11-21x86: Get rid of a problematic DPRINTF in PremFp.Gabe Black
2018-10-17arch: Get rid of the unused type AnyReg.Gabe Black
2018-10-12x86: Use little endian packet accessors.Gabe Black
2018-09-19syscall_emul: implement dir-related syscallsBrandon Potter
2018-09-19syscall_emul: expand AuxVector classBrandon Potter
2018-08-21misc: Appease GCC 8Jason Lowe-Power
2018-06-25syscall_emul: adding symlink system callMatt Sinclair
2018-06-25syscall_emul: adding link system callMatt Sinclair
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-05-24x86: Add op classes to the MediaOps.Gabe Black
2018-05-08arch-x86, arch-power: fix calls to bits and insertBitsMatt Sinclair
2018-05-03arch-x86: Enable fstatfs for x86_64Tony Gutierrez
2018-05-02arch-x86: implement movntps/movntpd SSE instsSteve Reinhardt
2018-05-02x86: Add a ld/st microop flag for marking an access uncacheable.Gabe Black
2018-05-02arch-x86: Enable the umask system callTony Gutierrez
2018-04-27sim,cpu,mem,arch: Introduced MasterInfo data structureGiacomo Travaglini