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Age
Commit message (
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Author
2018-06-25
syscall_emul: adding symlink system call
Matt Sinclair
2018-06-25
syscall_emul: adding link system call
Matt Sinclair
2018-06-22
arch-arm: AArch32 execution triggering AArch64 SW Break
Giacomo Travaglini
2018-06-22
arch-arm: BadMode checking if corresponding EL is implemented
Giacomo Travaglini
2018-06-14
arch: support issuing Atomic Mem Operation (AMO) requests
Tuan Ta
2018-06-14
arch-arm: Adapting IllegalExecution fault for AArch32
Giacomo Travaglini
2018-06-14
arch-arm: Add Illegal Execution flag to PCState
Giacomo Travaglini
2018-06-14
arch-arm: Read APSR in User Mode
Giacomo Travaglini
2018-06-13
arch-arm: Fix missing Request allocation
Giacomo Travaglini
2018-06-11
misc: Using smart pointers for memory Requests
Giacomo Travaglini
2018-06-11
misc: Substitute pointer to Request with aliased RequestPtr
Giacomo Travaglini
2018-06-06
arch-arm: Remove dead doingStage2 variable in PT walker
Andreas Sandberg
2018-06-06
arch-arm: Perform stage 2 lookups using the EL2 state
Andreas Sandberg
2018-06-06
arch-arm: Respect EL from translation type
Andreas Sandberg
2018-06-06
arch-arm: Fix page size handling when merging stage 1 and 2
Andreas Sandberg
2018-06-06
dev, arm: Add support for HYP & secure timers
Andreas Sandberg
2018-06-06
arch-arm: Adjust breakpoint EC depending on source state
Andreas Sandberg
2018-05-29
arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP
Giacomo Travaglini
2018-05-29
arch-arm: Remove unusued MISCREG_A64_UNIMPL
Giacomo Travaglini
2018-05-29
arch-arm: MPIDR.MT = 1 in a multithreaded system
Giacomo Travaglini
2018-05-29
arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation defined
Giacomo Travaglini
2018-05-29
arch-arm: Implement ARMv8.1 TTBR1_EL2 register
Giacomo Travaglini
2018-05-29
arch-arm: Add E2H bit to HCR_EL2 System register
Giacomo Travaglini
2018-05-24
x86: Add op classes to the MediaOps.
Gabe Black
2018-05-16
arch-arm: Fix semihosting arg count for SYS_GET_CMDLINE
Andreas Sandberg
2018-05-16
arch-arm: Add support for semihosting STDIO redirection
Andreas Sandberg
2018-05-12
arch-riscv: Update CSR implementations
Alec Roelke
2018-05-08
arch-x86, arch-power: fix calls to bits and insertBits
Matt Sinclair
2018-05-08
arch-arm: Map ID_x_EL1 registers to AArch32 version
Giacomo Travaglini
2018-05-03
arch-x86: Enable fstatfs for x86_64
Tony Gutierrez
2018-05-02
arch-x86: implement movntps/movntpd SSE insts
Steve Reinhardt
2018-05-02
x86: Add a ld/st microop flag for marking an access uncacheable.
Gabe Black
2018-05-02
arch-x86: Enable the umask system call
Tony Gutierrez
2018-04-27
sim,cpu,mem,arch: Introduced MasterInfo data structure
Giacomo Travaglini
2018-04-19
arch-arm: Add ARMv8.1 TTBR1_EL2 register
Giacomo Travaglini
2018-04-19
arch-arm: Fix Unknown Instruction disassemble
Giacomo Travaglini
2018-04-19
arch-arm: Change disassemble when MSR to UNKNOWN register
Giacomo Travaglini
2018-04-18
arch-arm: Fix masking in CPACR_EL1
Chuan Zhu
2018-04-18
arch-arm: Mask out unsupported trapped exception handling bits
Chuan Zhu
2018-04-18
arch-arm: Fix FPEXC32_EL2 to FPEXC mapping
Chuan Zhu
2018-04-18
arch-arm: Adding MiscReg Priv (EL1) global flag
Giacomo Travaglini
2018-04-18
arch-arm: Correct masking of cp10 and cp11 in CPACR
Chuan Zhu
2018-04-18
arch-arm: Using explicit invalidation in TLB
Giacomo Travaglini
2018-04-17
arch-arm: Fix secure MiscReg access when EL3 is not AArch32
Giacomo Travaglini
2018-04-10
arch-arm: Fix mrc,mcr to cop14 disassemble
Giacomo Travaglini
2018-04-06
arch: alpha: Fix an 8 year old bug from the transition to pc objects.
Gabe Black
2018-04-06
arch-arm: Add support for Tarmac trace generation
Giacomo Travaglini
2018-04-06
arch-arm: Add support for Tarmac trace-based simulation
Giacomo Travaglini
2018-04-06
arch-arm: Fix AArch32 branch instructions disassemble
Giacomo Travaglini
2018-04-06
arch-arm: Fix secure write of SCTLR when EL3 is AArch64
Giacomo Travaglini
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