gem5 - gem5

Age	Commit message (Expand)	Author
2019-12-01	arch-riscv: Fix disassembling of immediate for c.lui instruction	Ian Jiang
2019-11-28	arm: Make sure not to shift off of the end of a uint32_t in KVM.	Gabe Black
2019-11-26	arch-arm: Make the Tarmac parsed registers case insensitive	Giacomo Travaglini
2019-11-26	arch-riscv: Fix immediate decoding for integer shift immediate instructions	Ian Jiang
2019-11-26	arch-riscv: Fix disassembling for fence and fence.i	Ian Jiang
2019-11-26	arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated ifdefs.	Gabe Black
2019-11-25	arm: Stop serializing ISA values wihch are cached from the system.	Gabe Black
2019-11-25	arch-arm: default MIDR for Armv8 ISA processors	Adrian Herrera
2019-11-25	arch-riscv: Fix disassembling for atomic instructions	Ian Jiang
2019-11-25	arch-riscv: Fix disassembling of operand list for compressed instructions	Ian Jiang
2019-11-25	arch-riscv: Fix disassembling of immediate for U-type instructions	Ian Jiang
2019-11-22	arch-riscv: Fix bug in serialize and unserialize of Interrutps	IanJiangICT
2019-11-20	base,tests: Expanded GTests for addr_range.hh	Brandon Potter
2019-11-18	arch: Get rid of the (Big\|Little)EndianGuest namespaces.	Gabe Black
2019-11-18	arch: Make and use endian specific versions of the mem helpers.	Gabe Black
2019-11-18	arch-arm: R/W interface to AArch32 HCR2 misc reg	Adrian Herrera
2019-11-18	arch-arm: Fix short descriptors cacheability during table walks	Giacomo Travaglini
2019-11-18	arch-arm: Fix long descriptors cacheability during table walks	Giacomo Travaglini
2019-11-14	arch-arm: Refactor code to check if gic is GicV2	Chun-Chen TK Hsu
2019-11-14	config: Add fastmodel cluster in fs_bigLITTLE.py	Chun-Chen TK Hsu
2019-11-13	arm: Replace most htog and gtoh with htole and letoh.	Gabe Black
2019-11-13	arch-arm: fix routeToHyp for AArch64 in faults	Adrian Herrera
2019-11-13	fastmodel: Implement reading vector registers with readVecReg.	Gabe Black
2019-11-11	arch-arm: Fix TarmacParser handling of 64bit LD/ST	Giacomo Travaglini
2019-11-11	arch-arm: Provide SVE support to the TarmacTracer	Giacomo Travaglini
2019-11-11	arch-arm: Provide SVE support to the TarmacParser	Giacomo Gabrielli
2019-11-07	arm: Set the number of FloatRegs to zero.	Gabe Black
2019-11-07	power: Replace gtoh and htog with betoh and htobe.	Gabe Black
2019-11-07	x86: Replace htog and gtoh with htole and letoh.	Gabe Black
2019-11-07	mips: Replace gtoh and htog with letoh and htole.	Gabe Black
2019-11-07	sparc: Replace htog and gtoh with htobe and betoh.	Gabe Black
2019-11-07	fastmodel: Plumb the ITB and DTB through the IRIS thread context.	Gabe Black
2019-11-06	fastmodel: Implement inst count events in the IRIS thread contexts.	Gabe Black
2019-11-06	arch-arm: Simplify AMO code generation templates	Nikos Nikoleris
2019-11-05	arch-arm: Annotate original address in CMOs	Giacomo Travaglini
2019-11-02	arch,cpu: Move endianness conversion of inst bytes into the ISA.	Gabe Black
2019-11-01	arch-x86: Fix FLDCW_P and FNSTCW_P to use rip.	seanzw
2019-11-01	arch-arm: generic method for getting an ArmSystem	Adrian Herrera
2019-10-31	fastmodel: Add CortexA76x[234] models.	Gabe Black
2019-10-31	fastmodel: Enable auto bridging and use it to simplify CortexA76x1.	Gabe Black
2019-10-31	fastmodel: Templatize the xn versions of the CortexA76.	Gabe Black
2019-10-31	alpha: Convert htog and gtoh to htole and letoh.	Gabe Black
2019-10-30	arch,sim: Make copyStringArray take an explicit endianness.	Gabe Black
2019-10-30	arch: Make endianness a property of the OS class syscalls can consume.	Gabe Black
2019-10-30	fastmodel: Refactor the CortexA76x1 model for MP support.	Gabe Black
2019-10-30	fastmodel: Helper function to setup FastModels for simulation	Chun-Chen TK Hsu
2019-10-30	sparc: Create a helper functions to install firmware images.	Gabe Black
2019-10-25	mips,riscv: Get rid of some Alpha cruft in these System classes.	Gabe Black
2019-10-25	cpu: Get rid of the nextInstEventCount method.	Gabe Black
2019-10-25	cpu: Get rid of the serviceInstCountEvents method.	Gabe Black