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AgeCommit message (Expand)Author
2018-02-16arch-arm: IMPLEMENTATION DEFINED registerGiacomo Travaglini
2018-02-16arch-arm: Arch regs and pseudo regs distinctionGiacomo Travaglini
2018-02-16arch-arm: Fix syntax error in TLB::getResultTeChuan Zhu
2018-02-16arch-arm: Fix big endian support in {Load,Store}Double64Chuan Zhu
2018-02-16arch-arm: Fix big endian support in do{Long,L1,L2}DescriptorChuan Zhu
2018-02-16arch-arm: Add support for automatic reset addr selectionAndreas Sandberg
2018-02-16arch-arm: Change ArmFault cast from reinterpret to staticGiacomo Travaglini
2018-02-16arch-arm: Decode Brk64 instructionsAndreas Sandberg
2018-02-16arch-arm: Fix Secure state check in checkFPAdvSIMDTrap64Chuan Zhu
2018-02-13sim: Make Stats truly non-copy-constructibleRekai Gonzalez-Alberquilla
2018-02-09sim: Remove _numContexts member in System classGiacomo Travaglini
2018-02-08arch-arm: Correct SecureMonitorTrap vals for aarch32Giacomo Travaglini
2018-02-08arch-arm: Fixed error in choosing vector offsetChuan Zhu
2018-02-08arch-arm: Don't change PSTATE in Illegal Exception returnGiacomo Travaglini
2018-02-08arch-arm: Handle route to EL2 in Supervisor TrapChuan Zhu
2018-02-07arch-arm: Change the type of fault for dc ivac instructionsNikos Nikoleris
2018-02-07arch-arm: Unify permission checks for dc * instructionsNikos Nikoleris
2018-02-07arch-arm: Check cache maintenance insts for permission faultsNikos Nikoleris
2018-02-07arch-arm: Turn dc ivac to dc civac when some conditions are metNikos Nikoleris
2018-02-07arch-arm: Fix printing of the data cache maintenance instructionsNikos Nikoleris
2018-02-07arch-arm: Fix cache line size for cache maintenace instNikos Nikoleris
2018-02-07arch-arm: Fault when dc ivac is executed from EL0Nikos Nikoleris
2018-02-07arch-arm: Change function name for banked miscregsGiacomo Travaglini
2018-02-07arch-arm: Fix AArch32 SETEND InstructionGiacomo Travaglini
2018-02-07arch-arm: Correct Illegal Exception Return detectionGiacomo Travaglini
2018-02-07arch-arm: ELUsingAArch32K from armarm pseudocodeGiacomo Travaglini
2018-02-07arch-arm: isSecureBelow from armarm pseudocodeGiacomo Travaglini
2018-02-07arch-arm: Fix incorrect assumptions in ELIs64Chuan Zhu
2018-02-05arch-arm: Removing Serializing flag from ISBGiacomo Travaglini
2018-02-01alpha: fix for no 'break' in the case statementSujay Phadke
2018-01-31arch-x86: consistent style of comments in system filesChristian Menard
2018-01-30arch-x86: Granularity bit and segment limitMaximilian Stein
2018-01-29riscv: Add overrides to various StaticInst methods.Gabe Black
2018-01-29arch-arm: understandably initialize register permissionsCurtis Dunham
2018-01-29arm: extend MiscReg metadata structuresCurtis Dunham
2018-01-29arch-arm: understandably initialize register mappingsCurtis Dunham
2018-01-29arm: DT autogeneration - Generate memory nodeGlenn Bergmans
2018-01-29arm: DT autogeneration - Device Tree generation methodsGlenn Bergmans
2018-01-23arch-x86: Adding clflush, clflushopt, clwb instructionsSwapnil Haria
2018-01-23arch: Remove the "arch/tlb.hh" switching header.Gabe Black
2018-01-23tarch, mem: Abstract the data stored in the SE page tables.Gabe Black
2018-01-23x86, mem: Rewrite the multilevel page table class.Gabe Black
2018-01-20x86, mem: Don't try to force physical addresses on the system.Gabe Black
2018-01-20x86, mem: Get rid of PageTableOps::getBasePtr.Gabe Black
2018-01-20x86, mem: Pass the multi level page table layout in as a parameter.Gabe Black
2018-01-20arch, mem: Make the page table lookup function return a pointer.Gabe Black
2018-01-20arm, base: Generalize and move the BitUnion hash struct.Gabe Black
2018-01-20base: Rework bitunions so they can be more flexible.Gabe Black
2018-01-20sim, arch, base: Refactor the base remote GDB class.Gabe Black
2018-01-19arch, mem, sim: Consolidate and rename the SE mode page table classes.Gabe Black