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AgeCommit message (Expand)Author
2010-08-23ARM: BX instruction can be contitional if last instruction in a IT blockGene Wu
2010-08-23ARM: mark msr/mrs instructions as SerializeBefore/AfterMin Kyu Jeong
2010-08-23ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.Min Kyu Jeong
2010-08-23ARM: adding genMachineCheckFault() stub for ARM that doesn't panicMin Kyu Jeong
2010-08-23ARM: DFSR status value for sync external data abort is expected to be 0x8 in ...Gene Wu
2010-08-23ARM: Temporary local variables can't conflict with isa parser operands.Gene Wu
2010-08-23ARM: Exclusive accesses must be double word alignedAli Saidi
2010-08-23ARM: Add some registers for big loads/stores to support neon.Ali Saidi
2010-08-23ARM: Decode neon memory instructions.Ali Saidi
2010-08-23ARM: Clean up the ISA desc portion of the ARM memory instructions.Gabe Black
2010-08-23ARM: We don't currently support ThumbEE exceptions, so don't report that we doAli Saidi
2010-08-23ARM: Add system for ARM/Linux and bootstrappingAli Saidi
2010-08-23ARM: Implement some more misc registersAli Saidi
2010-08-23ARM: Fix an un-initialized variable bugAli Saidi
2010-08-23Loader: Make the load address mask be a parameter of the system rather than a...Ali Saidi
2010-08-23ARM: Finish the timing translation when taking a fault.Min Kyu Jeong
2010-08-23ARM: Use a stl queue for the table walker stateDam Sunwoo
2010-08-23Compiler: Fixes for GCC 4.5.Ali Saidi
2010-08-22X86: Get rid of unused file arguments.hh.Gabe Black
2010-08-22SPARC: Fix some style issues in utility.hh.Gabe Black
2010-08-22X86: Get rid of the unused getAllocator on the python base microop class.Gabe Black
2010-08-17x86: minor checkpointing bug fixesSteve Reinhardt
2010-08-17sim: revamp unserialization procedureSteve Reinhardt
2010-08-13CPU: Tidy up endianness handling for mmapped "IPR"s.Gabe Black
2010-07-22Power: The condition register should be set or cleared upon a system callTimothy M. Jones
2010-07-22Power: Provide a utility function to copy registers from one thread contextTimothy M. Jones
2010-07-21Fix x86 XCHG macro-op to use locked micro-ops for all memory accessesTushar Krishna
2010-07-15ARM: Make an SRS instruction with a bad mode cause an undefined instruction f...Gabe Black
2010-07-13ARM: Adjust the FP_Base_DepTag to be larger than the largest int reg index.Gabe Black
2010-06-25X86: Fix div2 flag calculation.Gabe Black
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-14stats: get rid of the never-really-used event stuffNathan Binkert
2010-06-03More minor gdb-related cleanup.Steve Reinhardt
2010-06-03ARM: Fix issue with m5.fast and ARMAli Saidi
2010-06-02ARM: Fix SPEC2000 benchmarks in SE mode. With this patch allAli Saidi
2010-06-02ARM: Fix IT state not updating when an instruction memory instruction faults.Min Kyu Jeong
2010-06-02ARM: Allow multiple outstanding TLB walks to queue.Dam Sunwoo
2010-06-02ARM TLB: Fix bug in memAttrs getting a bogus thread contextAli Saidi
2010-06-02ARM: Support table walks in timing mode.Dam Sunwoo
2010-06-02ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...Dam Sunwoo
2010-06-02ARM: Decode the neon instruction space.Gabe Black
2010-06-02ARM: Add a comment to vfp.cc that explains the asm statements.Gabe Black
2010-06-02ARM: Move some case values out of ##included files.Gabe Black
2010-06-02ARM: Combine some redundant cases in one of the data decode functions.Gabe Black
2010-06-02ARM: Add comments to the classes in macromem.hh.Gabe Black
2010-06-02ARM: Move code from vfp.hh to vfp.cc.Gabe Black
2010-06-02ARM: Make some of the trace code more compactAli Saidi
2010-06-02ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.Gabe Black
2010-06-02ARM: Move the ISA "clear" function into isa.cc.Gabe Black
2010-06-02ARM: Get rid of the binary dumping function in utility.hh.Gabe Black