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AgeCommit message (Expand)Author
2011-03-29Power: Fix compilation.Gabe Black
2011-03-26mips: cleanup ISA-specific codeKorey Sewell
2011-03-25Arm: Add in a missing miscRegName.Gabe Black
2011-03-24Arm: Get rid of unused and incomplete setCp15Register and readCp15Register.Gabe Black
2011-03-24Arm: Get rid of the unused copyStringArray32 method from Arm process classes.Gabe Black
2011-03-24ISA parser: Set up op_src_decl and op_dest_decl for pc operands.Gabe Black
2011-03-17ARM: Add minimal ARM_SE support for m5threads.Chris Emmons
2011-03-17ARM: Fix subtle bug in LDM.Ali Saidi
2011-03-17ARM: Implement the Instruction Set Attribute Registers (ISAR).Ali Saidi
2011-03-17ARM: Identify branches as conditional or unconditional and direct or indirect.Ali Saidi
2011-03-17ARM: Fix small bug with VLDM/VSTM instructions.Ali Saidi
2011-03-17ARM: Detect and skip udelay() functions in linux kernel.Ali Saidi
2011-03-17ARM: Allow conditional quiesce instructions.Ali Saidi
2011-03-17ARM: Fix RFE macrop.Matt Horsnell
2011-03-17ARM: Rename registers used as temporary state by microops.Matt Horsnell
2011-03-17O3: Send instruction back to fetch on squash to seed predecoder correctly.Ali Saidi
2011-03-17ARM: Previous change didn't end up setting instFlags, this does.Ali Saidi
2011-03-08Alpha: Fix the datatypes of some values read from the simulated kernel.Yi Xiang
2011-03-02X86: Use the npc as the pc when doing a nativetrace, not what M5 considers th...Gabe Black
2011-03-02X86: Decode the mysterious and elusive ffreep x87 instruction.Gabe Black
2011-03-01Spelling: Fix the a spelling error by changing mmaped to mmapped.Gabe Black
2011-03-01X86: Mark IO reads and writes as non-speculative.Gabe Black
2011-03-01X86: Mark prefetches as such in their instruction and request flags.Gabe Black
2011-02-27X86: If PCI config space is disabled, pass through to regular IO addresses.Gabe Black
2011-02-27X86: Use regular read requests in the walker instead of read exclusive.Gabe Black
2011-02-23ARM: Set ITSTATE correctly after FlushPipeAli Saidi
2011-02-23ARM: This panic can be hit during misspeculation so it can't exist.Ali Saidi
2011-02-23ARM: Bad interworking warn way to noisy when running real code w/misspeculation.Ali Saidi
2011-02-23ARM: NEON instruction templates modified to set the predicate flag to false w...Giacomo Gabrielli
2011-02-23ARM: Squash state on FPSCR stride or len write.Ali Saidi
2011-02-23ARM: Mark store conditionals as such.Matt Horsnell
2011-02-23ARM: Do something for ISB, DSB, DMBAli Saidi
2011-02-23ARM: Fix bug that let two table walks occur in parallel.Ali Saidi
2011-02-23ARM: Make Noop actually decode to a noop and set it's instflags.Ali Saidi
2011-02-23ARM: Delete OABI syscall handling.Ali Saidi
2011-02-23ARM: Reset simulation statistics when pref counters are reset.Ali Saidi
2011-02-23ARM: Adds dummy support for a L2 latency miscreg.Ali Saidi
2011-02-15X86: Get rid of "inline" on the MicroPanic constructor in decoder.cc.Gabe Black
2011-02-13X86: Detect branches taking into account instruction size.Gabe Black
2011-02-13X86: Put the result used for flags in an intermediate variable.Gabe Black
2011-02-13X86: Don't read in dest regs if all bits are replaced.Gabe Black
2011-02-13X86: On a bad microopc, return a microop that returns a fault that panics.Gabe Black
2011-02-13X86: Define fault objects to carry debug messages.Gabe Black
2011-02-13X86: Only reset npc to reflect instruction length once.Gabe Black
2011-02-12inorder: remove unused isa opsKorey Sewell
2011-02-11O3: Fix a few bugs in the TableWalker object.Giacomo Gabrielli
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli
2011-02-07X86: Obey the wp bit of CR0.Tim Harris
2011-02-07X86: Use all 64 bits of the lstar register in the SYSCALL_64 macroop.Tim Harris
2011-02-07X86: Fix JMP_FAR_I to unpack a far pointer correctly.Tim Harris