Age | Commit message (Expand) | Author |
2011-03-17 | ARM: Add minimal ARM_SE support for m5threads. | Chris Emmons |
2011-03-17 | ARM: Fix subtle bug in LDM. | Ali Saidi |
2011-03-17 | ARM: Implement the Instruction Set Attribute Registers (ISAR). | Ali Saidi |
2011-03-17 | ARM: Identify branches as conditional or unconditional and direct or indirect. | Ali Saidi |
2011-03-17 | ARM: Fix small bug with VLDM/VSTM instructions. | Ali Saidi |
2011-03-17 | ARM: Detect and skip udelay() functions in linux kernel. | Ali Saidi |
2011-03-17 | ARM: Allow conditional quiesce instructions. | Ali Saidi |
2011-03-17 | ARM: Fix RFE macrop. | Matt Horsnell |
2011-03-17 | ARM: Rename registers used as temporary state by microops. | Matt Horsnell |
2011-03-17 | O3: Send instruction back to fetch on squash to seed predecoder correctly. | Ali Saidi |
2011-03-17 | ARM: Previous change didn't end up setting instFlags, this does. | Ali Saidi |
2011-03-08 | Alpha: Fix the datatypes of some values read from the simulated kernel. | Yi Xiang |
2011-03-02 | X86: Use the npc as the pc when doing a nativetrace, not what M5 considers th... | Gabe Black |
2011-03-02 | X86: Decode the mysterious and elusive ffreep x87 instruction. | Gabe Black |
2011-03-01 | Spelling: Fix the a spelling error by changing mmaped to mmapped. | Gabe Black |
2011-03-01 | X86: Mark IO reads and writes as non-speculative. | Gabe Black |
2011-03-01 | X86: Mark prefetches as such in their instruction and request flags. | Gabe Black |
2011-02-27 | X86: If PCI config space is disabled, pass through to regular IO addresses. | Gabe Black |
2011-02-27 | X86: Use regular read requests in the walker instead of read exclusive. | Gabe Black |
2011-02-23 | ARM: Set ITSTATE correctly after FlushPipe | Ali Saidi |
2011-02-23 | ARM: This panic can be hit during misspeculation so it can't exist. | Ali Saidi |
2011-02-23 | ARM: Bad interworking warn way to noisy when running real code w/misspeculation. | Ali Saidi |
2011-02-23 | ARM: NEON instruction templates modified to set the predicate flag to false w... | Giacomo Gabrielli |
2011-02-23 | ARM: Squash state on FPSCR stride or len write. | Ali Saidi |
2011-02-23 | ARM: Mark store conditionals as such. | Matt Horsnell |
2011-02-23 | ARM: Do something for ISB, DSB, DMB | Ali Saidi |
2011-02-23 | ARM: Fix bug that let two table walks occur in parallel. | Ali Saidi |
2011-02-23 | ARM: Make Noop actually decode to a noop and set it's instflags. | Ali Saidi |
2011-02-23 | ARM: Delete OABI syscall handling. | Ali Saidi |
2011-02-23 | ARM: Reset simulation statistics when pref counters are reset. | Ali Saidi |
2011-02-23 | ARM: Adds dummy support for a L2 latency miscreg. | Ali Saidi |
2011-02-15 | X86: Get rid of "inline" on the MicroPanic constructor in decoder.cc. | Gabe Black |
2011-02-13 | X86: Detect branches taking into account instruction size. | Gabe Black |
2011-02-13 | X86: Put the result used for flags in an intermediate variable. | Gabe Black |
2011-02-13 | X86: Don't read in dest regs if all bits are replaced. | Gabe Black |
2011-02-13 | X86: On a bad microopc, return a microop that returns a fault that panics. | Gabe Black |
2011-02-13 | X86: Define fault objects to carry debug messages. | Gabe Black |
2011-02-13 | X86: Only reset npc to reflect instruction length once. | Gabe Black |
2011-02-12 | inorder: remove unused isa ops | Korey Sewell |
2011-02-11 | O3: Fix a few bugs in the TableWalker object. | Giacomo Gabrielli |
2011-02-11 | O3: Enhance data address translation by supporting hardware page table walkers. | Giacomo Gabrielli |
2011-02-07 | X86: Obey the wp bit of CR0. | Tim Harris |
2011-02-07 | X86: Use all 64 bits of the lstar register in the SYSCALL_64 macroop. | Tim Harris |
2011-02-07 | X86: Fix JMP_FAR_I to unpack a far pointer correctly. | Tim Harris |
2011-02-07 | X86: Read the LDT/GDT at CPL0 when executing an iret. | Tim Harris |
2011-02-07 | X86: Fix compiling vtophys.cc | Gabe Black |
2011-02-06 | m5: added work completed monitoring support | Brad Beckmann |
2011-02-06 | dev: fixed bugs to extend interrupt capability beyond 15 cores | Brad Beckmann |
2011-02-06 | x86: Timing support for pagetable walker | Joel Hestness |
2011-02-06 | x86: Add checkpointing capability to arch components | Joel Hestness |