| Age | Commit message (Expand) | Author |
|---|
| 2012-01-16 | Alpha: warn_once about broken PAL breakpoints. | Steve Reinhardt |
| 2012-01-12 | mips: compatibility between MIPS_SE and cross compiler from CodeSorcery | Deyuan Guo |
| 2012-01-12 | mips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS | Deyuan Guo |
| 2012-01-12 | mips: Fix decoder of two float-convert instructions | Deyuan Guo |
| 2012-01-12 | mips: definition of MIPS64_QNAN in registers.hh | Deyuan Guo |
| 2012-01-09 | X86: Add memory fence to I/O instructions | Nilay Vaish |
| 2012-01-09 | ARM: Add support for initparam m5 op | Ali Saidi |
| 2012-01-05 | X86 TLB: Move a DPRINTF to its correct place | Nilay Vaish |
| 2011-12-13 | gcc: fix unused variable warnings from GCC 4.6.1 | Nathan Binkert |
| 2011-12-01 | Device: Make changes necessary to support a coherent page walker cache. | Mitchell Hayenga |
| 2011-12-01 | ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction . | Ali Saidi |
| 2011-12-01 | X86: Fix a bad segmentation check for the stack segment. | Gabe Black |
| 2011-11-28 | SPARC: Minor style fix. | Gabe Black |
| 2011-11-27 | SPARC: Isolate FP operations enough to prevent code/rounding mode reordering. | Gabe Black |
| 2011-11-20 | X86: Fix the constant detecting three byte opcodes in the predecoder. | Gabe Black |
| 2011-11-03 | x86: Add microop for fence | Nilay Vaish |
| 2011-10-31 | GCC: Get everything working with gcc 4.6.1. | Gabe Black |
| 2011-10-22 | SE: move page allocation from PageTable to Process | Steve Reinhardt |
| 2011-10-22 | syscall_emul: implement MAP_FIXED option to mmap() | Steve Reinhardt |
| 2011-09-27 | Faults: Replace calls to genMachineCheckFault with M5PanicFault. | Gabe Black |
| 2011-09-27 | Faults: Add in generic faults that work like panics, warns, etc. | Gabe Black |
| 2011-09-26 | ISA parser: Use '_' instead of '.' to delimit type modifiers on operands. | Gabe Black |
| 2011-09-24 | SCons: Add a comment I forgot to add in earlier. | Gabe Black |
| 2011-09-24 | SCons: Make the ISA parser a source for its output files like the comments say. | Gabe Black |
| 2011-09-23 | X86: Move the MSR lookup table out of the TLB and into its own file. | Gabe Black |
| 2011-09-19 | MIPS: Final overhaul of MIPS faults to kill #if FULL_SYSTEM | Gabe Black |
| 2011-09-19 | MIPS, faults: Update how the PC is set. | Gabe Black |
| 2011-09-19 | MIPS: Get rid of skipFaultInstruction and setRestartAddress. | Gabe Black |
| 2011-09-19 | MIPS: Use inheritance to consolidate class definitions. | Gabe Black |
| 2011-09-19 | MIPS: Always compile in setExceptionState, including in SE mode. | Gabe Black |
| 2011-09-19 | MIPS: Consolidate TLB related faults. | Gabe Black |
| 2011-09-19 | MIPS: Get rid of the unused "count" field in FaultVals. | Gabe Black |
| 2011-09-19 | MIPS: Move the genMachineCheckFault function near MachineCheckFault. | Gabe Black |
| 2011-09-19 | MIPS: Consolidate the two AddressErrorFault variants. | Gabe Black |
| 2011-09-19 | Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault. | Gabe Black |
| 2011-09-19 | MIPS: Get rid of cruft in the fault classes. | Gabe Black |
| 2011-09-19 | MIPS: Add constructors to the fault classes. | Gabe Black |
| 2011-09-19 | MIPS: Use the CRTP to streamline the Fault class definitions. | Gabe Black |
| 2011-09-19 | SPARC: Remove #if FULL_SYSTEMs from the ISA description. | Gabe Black |
| 2011-09-19 | MIPS: Get rid of #if style config checks in the ISA description. | Gabe Black |
| 2011-09-19 | MIPS: Guard SystemCallFault::invoke consistently. | Gabe Black |
| 2011-09-19 | MIPS: Get rid of the unused (and partially defined) CacheError fault. | Gabe Black |
| 2011-09-19 | Alpha: Get rid of some #if FULL_SYSTEMs in the Alpha ISA description. | Gabe Black |
| 2011-09-19 | X86: Don't use "#if FULL_SYSTEM" in the X86 ISA description. | Gabe Black |
| 2011-09-19 | PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts. | Gabe Black |
| 2011-09-18 | Pseudoinst: Add an initParam pseudo inst function. | Gabe Black |
| 2011-09-13 | ARM: update TLB to set request packet ASID field | Daniel Johnson |
| 2011-09-13 | CP15 c15: enable execution with accesses to c15 registers | Chander Sudanthi |
| 2011-09-13 | ARM: Implement numcpus bits in L2CTLR register. | Daniel Johnson |
| 2011-09-13 | LSQ: Only trigger a memory violation with a load/load if the value changes. | Ali Saidi |
