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2007-04-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
2007-04-08Get the "hard" SPARC instructions working in o3. I don't like that the ↵Gabe Black
IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. --HG-- extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
2007-04-06Consolidated the microcode assembler to help separate it from more ↵Gabe Black
x86-centric stuff. --HG-- extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06Refactored the x86 isa description some more. There should be more ↵Gabe Black
seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. --HG-- rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06Clean up the code a little, fix (I think) a perceived problem with immediate ↵Gabe Black
sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. --HG-- extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
2007-04-06Add in a stub merging functionGabe Black
--HG-- extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06Clean up the macroop code.Gabe Black
--HG-- extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-04The process of going from an instruction definition to an instruction to be ↵Gabe Black
returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter. 2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number. 3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM. 4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s. 5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it. In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though. src/arch/x86/isa/decoder/one_byte_opcodes.isa: src/arch/x86/isa/microasm.isa: src/arch/x86/isa/microops/microops.isa: src/arch/x86/isa/operands.isa: src/arch/x86/isa/microops/base.isa: Implemented polymorphic microops and changed around the microcode assembler syntax. --HG-- extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
2007-04-04Fix a regular expression problem when recognizing labels for string ↵Gabe Black
substitution. --HG-- extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
2007-04-04Reworking how x86's isa description works. I'm adopting the following ↵Gabe Black
definitions to make figuring out what's what a little easier: MicroOp: A single operation actually implemented in hardware. MacroOp: A collection of microops which are executed as a unit. Instruction: An architected instruction which can be implemented with a macroop or a microop. --HG-- extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
2007-04-04Make "Name" really be the same as "name" with only the first letter ↵Gabe Black
capitalized. Before, it had the first letter capitalized but all the others lower case --HG-- extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
2007-04-04Made x86 ExtMachInsts distinguishable from each other by defining a real == ↵Gabe Black
and a real hash function. --HG-- extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
2007-04-04Added all the different variations of the register names.Gabe Black
--HG-- extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
2007-04-03Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 7be8ebe55a7b11552d78701520f93aa86db1e501
2007-04-03A batch of changes and fixes. Macroops are now generated automatically, ↵Gabe Black
multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented. --HG-- extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
2007-04-03Zero out ModRM if the byte isn't there, and fix some displacement size stuff.Gabe Black
--HG-- extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
2007-03-29Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 2f7f50f4ad31f741c0c67db96e49d30ca078fc94
2007-03-29get rid of CWP bounds warning...Ali Saidi
--HG-- extra : convert_revision : 74df09341c091c2d6ca9b46c6a3521f22b48acf4
2007-03-29Made the MultiOp format do a little more. It now sets up single microop ↵Gabe Black
instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. --HG-- extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
2007-03-29Add a microcode assembler. A microcode "program" is a series of statements. ↵Gabe Black
Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself. --HG-- extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
2007-03-29Fidget with the syntax of the MultiOp format in anticipation of making it ↵Gabe Black
actually work. --HG-- extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
2007-03-29Add code to generate register and immediate based integer op microop classes.Gabe Black
--HG-- extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
2007-03-29Allow "let" blocks to add code to the output files.Gabe Black
--HG-- extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
2007-03-24Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2 --HG-- extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
2007-03-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2 src/cpu/base_dyn_inst.hh: Hand merge. Line is no longer needed because it's handled in the ISA. --HG-- extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
2007-03-23Make hardware loads/stores serializing; they need to avoid certain ↵Kevin Lim
out-of-order interactions in the 21264. --HG-- extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
2007-03-22Add structure based bitfield syntax to the isa_parser. This is primarily ↵Gabe Black
useful for x86. --HG-- extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
2007-03-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
2007-03-21Add a junk operand. With no operands, the parser breaks.Gabe Black
--HG-- extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
2007-03-21Start implementing groups of instructions which do the same thing on ↵Gabe Black
different sets of inputs. --HG-- extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
2007-03-21put the int register count in intregs.hhGabe Black
--HG-- extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
2007-03-21Break out the one and two byte opcodes into different files. Also change ↵Gabe Black
what bits decode is done on to reflect where clumps of instructions are. --HG-- extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
2007-03-21Missed a constGabe Black
--HG-- rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
2007-03-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace --HG-- extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
2007-03-20Ignore "time" and "times" syscalls.Gabe Black
--HG-- extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
2007-03-20Added syntax for structure oriented extMachInsts.Gabe Black
--HG-- extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
2007-03-18Compile fixes for SPARC_FS.Gabe Black
src/arch/alpha/predecoder.hh: src/arch/sparc/predecoder.hh: Put in a missing include src/cpu/exetrace.cc: Convert the legion lockstep stuff from makeExtMI to the predecoder object. --HG-- extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
2007-03-17The syntax used for twin stores was confusing the parser so it's now broken ↵Gabe Black
down farther. --HG-- extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
2007-03-16Make the SPARC branch instructions use ExtMachInsts in their constructors. ↵Gabe Black
This isn't necessary since they don't use the extended fields, but it's more consistent and more correct. --HG-- extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
2007-03-15Refactor things a little.Gabe Black
--HG-- extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
2007-03-15File with the predecoder in it.Gabe Black
src/arch/x86/predecoder.cc: File for the x86 predecoder process function. --HG-- extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
2007-03-15Split the x86 "process" predecoder method into it's own file.Gabe Black
--HG-- extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
2007-03-15Changed warns to DPRINTFs and multiply by 8 where needed.Gabe Black
--HG-- extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
2007-03-15Added immediate value support, and fixed alot of bugs. This won't support 3 ↵Gabe Black
byte opcodes. --HG-- extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
2007-03-15Compile fixGabe Black
--HG-- extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
2007-03-15Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 src/arch/mips/utility.hh: src/arch/x86/SConscript: Hand merge --HG-- extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
2007-03-15Make the predecoder an object with it's own switched header file. Start ↵Gabe Black
adding predecoding functionality to x86. src/arch/SConscript: src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/cpu/base.hh: src/cpu/o3/fetch.hh: src/cpu/o3/fetch_impl.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/static_inst.hh: src/arch/alpha/predecoder.hh: src/arch/mips/predecoder.hh: src/arch/sparc/predecoder.hh: Make the predecoder an object with it's own switched header file. --HG-- extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
2007-03-13Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace --HG-- extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
2007-03-13Replaced makeExtMI with predecode.Gabe Black
Removed the getOpcode function from StaticInst which only made sense for Alpha. Started implementing the x86 predecoder. --HG-- extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
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