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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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Age
Commit message (
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Author
2008-12-17
Make Alpha pseudo-insts available from SE mode.
Steve Reinhardt
2008-12-16
SPARC: Truncate syscall args and return values appropriately.
Gabe Black
2008-12-07
imported patch aux-fix.patch
Lisa Hsu
2008-12-06
X86: Add add_entry back in.
Gabe Black
2008-12-06
flags: Change naming of functions to be clearer
Nathan Binkert
2008-12-05
This brings M5 closer to modernity - the kernel being advertised is newer so ...
Lisa Hsu
2008-12-04
This patch pulls out the auxiliary vector struct from individual ISA
Lisa Hsu
2008-11-15
syscalls: fix latent brk/obreak bug.
Steve Reinhardt
2008-11-14
Fix a bunch of bugs I introduced when I changed the flags stuff for packets.
Nathan Binkert
2008-11-10
pseudo inst: Add rpns (read processor nanoseconds) instruction.
Nathan Binkert
2008-11-10
mem: update stuff for changes to Packet and Request
Nathan Binkert
2008-11-09
X86: Fix completeAcc get call.
Gabe Black
2008-11-05
Fix a few more places where the context stuff wasn't changed
Nathan Binkert
2008-11-04
get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
Lisa Hsu
2008-11-02
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
Lisa Hsu
2008-11-02
Make it so that all thread contexts are registered with the System, even in
Lisa Hsu
2008-11-02
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
Lisa Hsu
2008-10-21
style: Use the correct m5 style for things relating to interrupts.
Nathan Binkert
2008-10-20
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...
Ali Saidi
2008-10-16
get rid of local variable that's only used in an assert so fast compiles
Nathan Binkert
2008-10-12
X86: Set the delayed commit flag in x86 microops appropriately.
Gabe Black
2008-10-12
X86: Make the local APIC timer event generate an interrupt.
Gabe Black
2008-10-12
X86: Implement the EOI register in the local APIC.
Gabe Black
2008-10-12
X86: Add some DPRINTFs to the local APIC.
Gabe Black
2008-10-12
X86: Fix the segment setting code in IRET, and make it restore the flags.
Gabe Black
2008-10-12
X86: Panic when an unimplemented fault is invoked, rather than spinning forever
Gabe Black
2008-10-12
X86: Implement the swapgs instruction.
Gabe Black
2008-10-12
X86: Add wrval/rdval microops for reading significant miscregs.
Gabe Black
2008-10-12
X86: Make the x86 interrupt fault kick off the interrupt microcode.
Gabe Black
2008-10-12
X86: Implement entering an interrupt in microcode.
Gabe Black
2008-10-12
X86: Make sure register microops set fault rather than returning one.
Gabe Black
2008-10-12
X86: Implement an wrdh microop which loads bases/offsets from 16 byte descrip...
Gabe Black
2008-10-12
X86: Implement local labels for the ROM that actually refer into the ROM.
Gabe Black
2008-10-12
X86: Implement the chks check of interrupt gate target code segments.
Gabe Black
2008-10-12
X86: Add a check type for interrupt gates.
Gabe Black
2008-10-12
X86: Fix chks checking the submode for stack segments.
Gabe Black
2008-10-12
X86: Let segment manipulation microops be conditional.
Gabe Black
2008-10-12
X86: Let the microassembler know about the microcode only H segment.
Gabe Black
2008-10-12
X86: Fix the rdbase microop
Gabe Black
2008-10-12
Get rid of old RegContext code.
Gabe Black
2008-10-12
X86: Create a handy way to access labels from the ROM in microcode.
Gabe Black
2008-10-12
X86: Make X86's microcode ROM actually do something.
Gabe Black
2008-10-12
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
Gabe Black
2008-10-12
X86: Create an eret microop which returns from ROM to combinational decoding.
Gabe Black
2008-10-12
X86: Make Br never report itself as the last microop.
Gabe Black
2008-10-12
X86: Create a SeqOp class of microops and make Br one of them.
Gabe Black
2008-10-12
X86: Implement CPUID with a magical function instead of microcode.
Gabe Black
2008-10-12
X86: Fix the ordering of special physical address ranges.
Gabe Black
2008-10-12
X86: Make the local APIC process interrupts and send them to the CPU.
Gabe Black
2008-10-12
X86: Make the local APIC handle interrupt messages from the IO APIC.
Gabe Black
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