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AgeCommit message (Expand)Author
2017-02-27syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...Brandon Potter
2017-02-27syscall_emul: [patch 14/22] adds identifier system callsBrandon Potter
2017-02-27x86: remove unnecessary parameter from functionsBrandon Potter
2017-02-27gpu-compute: remove unnecessary member from classTony Gutierrez
2017-02-27gpu-compute: mark functions with override if replacing virtualBrandon Potter
2017-02-27arch: Include generated decoder header after normal headersAndreas Sandberg
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2015-07-20syscall_emul: [patch 11/22] extend functionality of fcntlBrandon Potter
2017-02-23x86: remove redundant condition check in tlb codeBrandon Potter
2017-02-21arm: Fix DPRINTFs with arguments in the instruction declarationsNikos Nikoleris
2017-02-21arm: Blame the right instruction address on a Prefetch AbortNikos Nikoleris
2016-11-09syscall_emul: [patch 9/22] remove unused global variable (num_processes)Brandon Potter
2016-11-09syscall_emul: [patch 8/22] refactor process classBrandon Potter
2016-11-09syscall_emul: [patch 5/22] remove LiveProcess class and use Process insteadBrandon Potter
2017-02-17sparc: fix bugs caused by cd7f3a1dbf55Brandon Potter
2017-02-14arm, kvm: remove KvmGicCurtis Dunham
2017-02-14arm, kvm: implement MuxingKvmGicCurtis Dunham
2017-02-14sim, kvm: make KvmVM a System parameterCurtis Dunham
2017-02-14sim,kvm,arm: fix typosCurtis Dunham
2017-02-10x86: Fix implicit stack addressing in 64-bit modeJason Lowe-Power
2017-02-09arm: AArch64 report cache size correctly when reading CTR_EL0Bjoern A. Zeeb
2017-01-27riscv: Fix crash when syscall argument reg index is too highAlec Roelke
2016-11-09syscall_emul: [patch 4/22] remove redundant M5_pid field from processBrandon Potter
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
2016-11-09syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .ccBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2017-01-03sim: Remove redundant export_method_cxx_predeclsAndreas Sandberg
2016-12-19arm: provide correct timer availability in ID_PFR1 registerCurtis Dunham
2016-12-19arm: compute ID_AA64PFR{0,1}_EL1 registersCurtis Dunham
2016-12-19arm: compute ID_PFR{0,1} registersCurtis Dunham
2016-12-19arm: miscreg refactoringCurtis Dunham
2016-12-19arm: audit SCTLRCurtis Dunham
2016-12-19arm: remove SCTLR.FICurtis Dunham
2016-12-19arm: update AArch{64,32} register mappingsCurtis Dunham
2016-12-15syscall_emul: implement fallocateBrandon Potter
2016-12-15syscall_emul: add support for x86 statfs system callsBrandon Potter
2016-12-02hsail: disable asserts to allow immediate operands i.e. 0 with loadsBrandon Potter
2016-12-02hsail: add stub type and stub out several instructionsBrandon Potter
2016-12-02hsail: add popcount type and generate popcount instructionsBrandon Potter
2016-12-02hsail: add a wavesize case statement to register operand codeBrandon Potter
2016-12-02hsail: generate mov instructions for more arith_types and bit_typesBrandon Potter
2016-12-02hsail: fix unsigned offset bug in address calculationTony Gutierrez
2016-11-30riscv: [Patch 7/5] Corrected LRSC semanticsAlec Roelke
2016-11-30riscv: [Patch 6/5] Improve Linux emulation for RISC-VAlec Roelke
2016-11-30riscv: [Patch 5/5] Added missing support for timing CPU modelsAlec Roelke
2016-11-30riscv: [Patch 4/5] Added RISC-V atomic memory extension RV64AAlec Roelke
2016-11-30riscv: [Patch 3/5] Added RISCV floating point extensions RV64FDAlec Roelke
2016-11-30riscv: [Patch 2/5] Added RISC-V multiply extension RV64MAlec Roelke
2016-11-30arch: [Patch 1/5] Added RISC-V base instruction set RV64IAlec Roelke
2016-11-21x86: fix issue with casting in Cvtf2iTony Gutierrez