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AgeCommit message (Expand)Author
2015-02-16arm: Merge ISA files with pseudo instructionsAndreas Sandberg
2015-02-11mem: Clarification of packet crossbar timingsMarco Balboni
2015-02-11sim: Move the BaseTLB to src/arch/generic/Andreas Sandberg
2015-01-25arm: always set the IsFirstMicroop flagAli Saidi
2015-01-25cpu: Remove all notion that we know when the cpu is misspeculating.Ali Saidi
2015-01-25cpu: Put all CPU instruction tracers in a single fileAli Saidi
2015-01-22mem: Remove unused Packet src and dest fieldsAndreas Hansson
2015-01-22x86: Delay X86 table walk on receiving walker responseAndreas Hansson
2015-01-22mem: Clean up Request initialisationAndreas Hansson
2015-01-10x86 : fxsave and fxrestore missing template codeEmilio Castillo
2015-01-06x86: Enable three bits in the FamilyModelStepping ECX CPUID bitfield.Gabe Black
2015-01-06cpuid, x86: Revert "Enabling more features in CPUid"Gabe Black
2015-01-03arm: Add unlinkat syscall implementationmike upton
2015-01-03x86: implements the simd128 ADDSUBPD instructionMaxime Martinasso
2014-12-23arm: Add stats to table walkerCurtis Dunham
2014-12-23arm: Raise an alignment fault if a PC has illegal alignmentAndreas Sandberg
2014-12-23arm: Clean up and document decoder APIAndreas Sandberg
2014-12-23arm: Add support for filtering in the PMUAndreas Sandberg
2014-12-08arm: Fix decoding of PMXEVTYPER_EL0 and PMCCFILTR_EL0Andreas Sandberg
2014-12-05misc: Generalize GDB single stepping.Gabe Black
2014-12-05x86: Implement a remote GDB stub.Gabe Black
2014-12-05misc: Make the GDB register cache accessible in various sized chunks.Gabe Black
2014-12-04x86: Rework opcode parsing to support 3 byte opcodes properly.Gabe Black
2014-12-04arch: Allow named constants as decode case values.Gabe Black
2014-12-02x86: Clean up style in process.cc.Gabe Black
2014-12-02arm: Fix TLB ignoring faults when table walkingAndrew Bardsley
2014-12-02cpu: Always mask the snoop address when performing lock checkAndreas Hansson
2014-11-23mem: Page Table map api modificationAlexandru Dutu
2014-11-23x86: Segment initialization to support KvmCPU in SEAlexandru Dutu
2014-11-23kvm, x86: Adding support for SE mode executionAlexandru Dutu
2014-11-23cpuid, x86: Enabling more features in CPUidAlexandru Dutu
2014-11-17x86: Fix setting segment bases in real mode.Gabe Black
2014-11-17x86: Fix some bugs in the real mode far jmp instruction.Gabe Black
2014-11-17x86: APIC: Only set deliveryStatus if our IPI is going somewhere.Gabe Black
2014-11-17x86: APIC: Fix the getRegArrayBit function.Gabe Black
2014-11-16x86: Fix the CPUID Long Mode Address Size function.Gabe Black
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-29automated mergeAli Saidi
2014-10-29arm, tests: Update config files to more recent kernels and create 64-bit regr...Ali Saidi
2014-10-29arm, mem: Fix drain bug and provide drain prints for more components.Ali Saidi
2014-10-29arm: Fix multi-system AArch64 boot w/caches.Ali Saidi
2014-10-29arm: Mark some miscregs (timer counter) registers at unverifiable.Ali Saidi
2014-10-22sim: revert 6709bbcf564dNilay Vaish
2014-10-20x86: Fixes to avoid LTO warningsAndreas Hansson
2014-10-20sim: implement getdents/getdents64 in user modeMichael Adler
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-10-16arch,x86,mem: Dynamically determine the ISA for Ruby store checkAndreas Hansson
2014-10-16arm: Add helper methods to setup architected PMU eventsAndreas Sandberg
2014-10-16arm: Add TLB PMU probesAndreas Sandberg
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