summaryrefslogtreecommitdiff
path: root/src/arch
AgeCommit message (Expand)Author
2012-05-10gem5: Fix a number of incorrect case statementsAli Saidi
2012-05-01MEM: Separate requests and responses for timing accessesAndreas Hansson
2012-04-29X86: Fix the IMUL_R_P_I macroop.Gabe Black
2012-04-29X86: Fix up the open system call's flags.Vince Weaver
2012-04-29X86: Make gem5 ignore a bunch of syscalls.Vince Weaver
2012-04-24X86: Clear out duplicate TLB entries when adding a new one.Gabe Black
2012-04-23ISA: Put parser generated files in a "generated" directory.Gabe Black
2012-04-21X86: Report an error if there's no kernel object, don't blindly use it.Gabe Black
2012-04-15X86: Fix a tiny typo in the load/store microop constructor.Gabe Black
2012-04-14X86: Use the AddrTrie class to implement the TLB.Gabe Black
2012-04-14MEM: Remove the Broadcast destination from the packetAndreas Hansson
2012-04-14MEM: Separate snoops and normal memory requests/responsesAndreas Hansson
2012-04-14clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6Andreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-03-31X86: Fix address size handling so real mode works properly.Gabe Black
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-26Power: Change bitfield name to avoid conflicts with range_mapAndreas Hansson
2012-03-21ARM: Fix case where cond/uncond control is mis-specifiedNathanael Premillieu
2012-03-21ARM: Clean up condCodes in IT blocks.Ali Saidi
2012-03-21ARM: IT doesn't need to be serializing.Geoffrey Blake
2012-03-19gcc: Clean-up of non-C++0x compliant code, first stepsAndreas Hansson
2012-03-19clang: Fix recently introduced clang compilation errorsAndreas Hansson
2012-03-09ARM: Fix branch prediction issue with CB(N)Z instructionBrian Grayson
2012-03-09CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPUGeoffrey Blake
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-03-09ARM: Don't reset CPUs that are going to be switched in.Ali Saidi
2012-03-09System: Move code in initState() back into constructor whenever possible.Ali Saidi
2012-03-09ARM: Fix valgrind reported error on O3 that was causing minor stats changes.Ali Saidi
2012-03-02ARM: FIx a bug preventing multiple cores booting a VExpress_EMM machine.Ali Saidi
2012-03-01ARM: Add support for Versatile Express extended memory mapAli Saidi
2012-03-01ARM: Add limited CP14 support.Matt Horsnell
2012-03-01ARM: move kernel func event to correct location.Dam Sunwoo
2012-03-01ARM: fix bits-to-fp conversion function declarations.Giacomo Gabrielli
2012-03-01x86: Fix x86 TLB and WalkerNilay Vaish
2012-02-26X86: Use the M5PanicFault fault in execute methods instead of calling panic.Gabe Black
2012-02-24MEM: Make port proxies use references rather than pointersAndreas Hansson
2012-02-24MEM: Move port creation to the memory object(s) constructionAndreas Hansson
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-02-12X86: open flags: Another patch from Vince WeaverGabe Black
2012-02-12cpu: add separate stats for insts/ops both globally and per cpu modelAnthony Gutierrez
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-02-11SPARC: Make PSTATE and HPSTATE a BitUnion.Gabe Black
2012-02-07Faults: Turn off arch/faults.hhGabe Black
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-31util: implements "writefile" gem5 op to export file from guest to host filesy...Dam Sunwoo
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-30Merge with main repository.Gabe Black
2012-01-30MEM: Clean-up of Functional/Virtual/TranslatingPort remnantsAndreas Hansson
2012-01-29Implement Ali's review feedback.Gabe Black