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2007-03-10Rework the way SCons recurses into subdirectories, making itNathan Binkert
automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace --HG-- extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
2007-03-09Split the syscall table, SPARC specific syscall implementations, and the 32 ↵Gabe Black
bit syscall table into it's own file. Corrected problems with the stat structure. These should be tested on 64 bit x86 and SPARC machines. --HG-- extra : convert_revision : 5d9fe19e031b92e111069c6b89c3dbeb29975b8a
2007-03-09implement ipi stufff for SPARCAli Saidi
src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/arch/x86/utility.hh: add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi src/arch/sparc/isa/decoder.isa: handle writable bits of strandstatus register in miscregfile src/arch/sparc/miscregfile.hh: some constants for the strand status register src/arch/sparc/ua2005.cc: properly implement the strand status register src/dev/sparc/iob.cc: implement ipi generation properly src/sim/system.cc: call into the ISA to start the CPU (or not) --HG-- extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
2007-03-08Panic if any CMT registers are accessedAli Saidi
src/arch/sparc/asi.cc: src/arch/sparc/asi.hh: add CMT ASI registers src/arch/sparc/tlb.cc: Panic if any of the CMT registers are being accessed --HG-- extra : convert_revision : b9a94281e2074a576ac21d042b756950d509e758
2007-03-08Fixed an off-by-one error.Gabe Black
--HG-- extra : convert_revision : 498fef18cf339cabc2c00e4758bc8a0da857daca
2007-03-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace --HG-- extra : convert_revision : becba8537b11ee4ef33bbf129bef2ca047403df5
2007-03-08Fix up the SPARC initial stack frame to match an actual 32 bit process.Gabe Black
--HG-- extra : convert_revision : 3995744c3bf955a370b18f6e88de1bfb82f79843
2007-03-07I missed a couple of WithEffects, this should do itAli Saidi
--HG-- extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915
2007-03-07Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same ↵Gabe Black
across all architectures. --HG-- extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
2007-03-07Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/tmp/newmem --HG-- extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
--HG-- extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
2007-03-06Get X86 to load an elf and start a process for it.Gabe Black
src/arch/x86/SConscript: Add in process source files. src/arch/x86/isa_traits.hh: Replace magic constant numbers with the x86 register names. src/arch/x86/miscregfile.cc: Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy. src/arch/x86/process.hh: An X86 process class. src/base/loader/elf_object.cc: Add in code to recognize x86 as an architecture. src/base/traceflags.py: Add an x86 traceflag src/sim/process.cc: Add in code to create an x86 process. src/arch/x86/intregs.hh: A file which declares names for the integer register indices. src/arch/x86/linux/linux.cc: src/arch/x86/linux/linux.hh: A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either. src/arch/x86/linux/process.cc: src/arch/x86/linux/process.hh: An x86 linux process. The syscall table is split out into it's own file. src/arch/x86/linux/syscalls.cc: The x86 Linux syscall table and the uname function. src/arch/x86/process.cc: The x86 process base class. tests/test-progs/hello/bin/x86/linux/hello: An x86 hello world test binary. --HG-- extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
2007-03-05Fill out a stub version of the vtophys header file.Gabe Black
--HG-- extra : convert_revision : 2c10a80a2f73207539e3f98b4a3b864d431f5035
2007-03-05Add in NumGDBRegs so the constructor to the base class can get all it's ↵Gabe Black
arguments. --HG-- extra : convert_revision : fcec1ad134b53a419a952e556ed75cb1559a1127
2007-03-05Reorganize the floating point register file a little.Gabe Black
--HG-- extra : convert_revision : 643c147b77e931d49ac559681d4bbda737f6e1c7
2007-03-05Add some new source files.Gabe Black
--HG-- extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7
2007-03-05Stub decoder. This is probably even farther from finished than it looks...Gabe Black
--HG-- extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
2007-03-05Added missing include.Gabe Black
--HG-- extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
2007-03-05Added LargestRead type for x86. I might have picked the wrong type.Gabe Black
--HG-- extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
2007-03-05Stub implementation for x86.Gabe Black
--HG-- extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
2007-03-05Stub implementation for x86Gabe Black
--HG-- extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
2007-03-05Added fault generation functions. I would still like to see these go away. ↵Gabe Black
The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures. --HG-- extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
2007-03-05Added stub implementations or prototypes for all the functions in this file.Gabe Black
--HG-- extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
2007-03-05Added in a missing include.Gabe Black
--HG-- extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
2007-03-05Filled in a stub header file for setting the result of a syscall.Gabe Black
--HG-- extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
2007-03-05Filled in a stub header file for a stacktrace object. I'm still not sure ↵Gabe Black
what this is for, and it probably doesn't work on anything but Alpha. --HG-- extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
2007-03-05Filled in a stub header file for remote gdbGabe Black
--HG-- extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
2007-03-05Correct a typoGabe Black
--HG-- extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
2007-03-05Make the constructor (and all the other functions) publicGabe Black
--HG-- extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
2007-03-05Various touch upsGabe Black
--HG-- extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
2007-03-05Added a missing include.Gabe Black
--HG-- extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
2007-03-05Added a missing include.Gabe Black
--HG-- extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
2007-03-05Fix up the remote gdb include gaurds so it doesn't use the same symbol as ↵Gabe Black
Alpha does. --HG-- extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
2007-03-05x86 register file includes.Gabe Black
--HG-- extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
2007-03-05Include the x86 specific traits file.Gabe Black
--HG-- extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
2007-03-05Stub x86 Fault class which just panics.Gabe Black
--HG-- extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
2007-03-05A new file for x86 specific parameters. This could be implemented as a sim ↵Gabe Black
object? --HG-- extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
2007-03-05Add in a declaration of class Checkpoint rather than expecting it to come ↵Gabe Black
from some other include. --HG-- extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
2007-03-05Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
2007-03-04Don't use the exact same name as a system header #defineNathan Binkert
--HG-- extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
2007-03-03Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03Filled in with basic x86 stuff. Some things are missing, wrong, or ↵Gabe Black
nonsensical for x86. --HG-- extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39
2007-03-03Filled in with basic x86 information. Some things are missing, wrong, or ↵Gabe Black
non-sensical in x86. --HG-- extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
2007-03-03Add build hooks for x86.Gabe Black
--HG-- extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
2007-03-03Implement the _llseek syscall. It's Linux only, so we'll actually use the ↵Gabe Black
lseek syscall. --HG-- extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
2007-03-03Fix some issues with 32 bit processes.Gabe Black
--HG-- extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way ↵Ali Saidi
as the twin 64 bit loads src/arch/isa_parser.py: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/operands.isa: src/base/bigint.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/mem/packet_access.hh: make ldtw(a) Twin 32 bit load work correctly --HG-- extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42
2007-03-02Forgot to commit this new file last earlier.Gabe Black
--HG-- extra : convert_revision : f2d80ae551b7e29426141d5c9fe355b43a0b9c7d