gem5 - gem5

Age	Commit message (Expand)	Author
2014-09-03	arch, cpu: Factor out the ExecContext into a proper base class	Andreas Sandberg
2014-09-03	arch: Cleanup unused ISA traits constants	Andreas Hansson
2014-09-03	config: Change parsing of Addr so hex values work from scripts	Mitch Hayenga
2014-09-03	arm: Fix ExtMachInst hash operator underlying type	Andreas Hansson
2014-09-01	x86: set op class of two fp instructions	Nilay Vaish
2014-08-28	mem: adding architectural page table support for SE mode	Alexandru
2014-08-26	base: Replace the internal varargs stuff with C++11 constructs	Andreas Sandberg
2014-08-26	mips: Fix RLIMIT_RSS naming	Mitch Hayenga
2014-08-26	sparc: Fixup bit ordering in the PSTATE bit union	Andreas Sandberg
2014-08-13	arm: change MISCREG_L2ERRSR to warn not fail	Dam Sunwoo
2014-08-13	mips: Remove unused private members to fix compile-time warning	Andreas Sandberg
2014-08-13	power: Remove unused private members to fix compile-time warning	Andreas Sandberg
2014-03-11	arm: remove dead code fplib mul64x64	Curtis Dunham
2014-06-30	power: Add basic DVFS support for gem5	Stephan Diestelhorst
2014-06-21	x86: fix table walker assertion	Binh Pham
2014-05-31	style: eliminate equality tests with true and false	Steve Reinhardt
2014-05-12	syscall emulation: clean up & comment SyscallReturn	Steve Reinhardt
2014-04-17	arm: Make sure UndefinedInstructions are properly initialized	Ali Saidi
2014-04-17	arm: allow DC instructions by default so SE mode works	Ali Saidi
2014-04-17	sim, arm: implement more of the at variety syscalls	Ali Saidi
2014-05-09	cpu: Add flag name printing to StaticInst	Andrew Bardsley
2014-05-09	arm: Add branch flags onto macroops	Andrew Bardsley
2014-05-09	arm: add preliminary ISA splits for ARM arch	Curtis Dunham
2014-05-09	arch: teach ISA parser how to split code across files	Curtis Dunham
2014-05-09	arch, arm: Preserve TLB bootUncacheability when switching CPUs	Geoffrey Blake
2014-05-09	cpu, arm: Allow the specification of a socket field	Akash Bagdia
2014-05-09	arm: Panics in miscreg read functions can be tripped by O3 model	Geoffrey Blake
2014-05-09	arch: remove inline specifiers on all inst constrs, all ISAs	Curtis Dunham
2014-05-09	arm: cleanup ARM ISA definition	Curtis Dunham
2014-04-23	arm: Correctly display disassembly of vldmia/vstmia	Curtis Dunham
2014-04-23	arm: Don't use a stack allocated mnemonic	Mitchell Hayenga
2014-04-23	arch: remove 'null update' check in isa-parser	Curtis Dunham
2014-03-23	arm: m5ops readfile64 args broken, offset coming through garbage	Eric Van Hensbergen
2014-03-16	kvm: x86: Add support for x86 INIT and STARTUP handling	Andreas Sandberg
2014-03-12	alpha: Small removal of dead comments/code from alpha ISA	Paul Rosenfeld
2014-03-07	arm: Handle functional TLB walks properly	Geoffrey Blake
2014-03-07	scons: Fixes uninitialized warnings issued by clang	Mitch Hayenga
2014-03-07	arm: Fix uninitialised warning with gcc 4.8	Stephan Diestelhorst
2014-03-07	mem: Wakeup sleeping CPUs without caches on LLSC	Ali Saidi
2014-03-03	x86: Setup correct TSL/TR segment attributes on INIT	Andreas Sandberg
2014-03-01	cpu: Enable fast-forwarding for MIPS InOrderCPU and O3CPU	Christopher Torng
2014-02-05	x86: Fix x87 state transfer bug	Andreas Sandberg
2014-02-02	x86, kvm: Fix bug in the RFlags get and set functions	Nikos Nikoleris
2014-01-28	arm: Enable umask syscall in SE mode	Mitch Hayenga
2014-01-27	x86: use lfpimm instead of limm for fptan	Nilay Vaish
2014-01-27	x86: implements x87 add/sub instructions	Nilay Vaish
2014-01-27	x86: implements fxch instruction.	Nilay Vaish
2014-01-27	x86: correct error in emms instruction.	Nilay Vaish
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2014-01-24	arch: Make all register index flattening const	Andreas Hansson