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2008-06-12X86: Make the cpuid processor identifier return a real string.Gabe Black
2008-06-12X86: Make the e820 table manually or automatically configurable from python.Gabe Black
2008-06-12X86: Make the disassembly for halt conform with the other microops.Gabe Black
2008-06-12X86: Implement and hook up STI and CLI instructions.Gabe Black
2008-06-12X86: Add an event for the apic timer timeout. It doesn't get used yet.Gabe Black
2008-06-12X86: Rename the divide count register to divide configuration.Gabe Black
2008-06-12X86: Make the apic isr and irr work.Gabe Black
2008-06-12X86: Make the apic task priority register work.Gabe Black
2008-06-12X86: Make the logical destination and destination format work.Gabe Black
2008-06-12X86: Make the apic ID register work.Gabe Black
2008-06-12X86: Make the apic version register work.Gabe Black
2008-06-12X86: Implement a partial, sort of correct version of the protected mode ↵Gabe Black
variant of iret.
2008-06-12X86: Change how segment loading is performed.Gabe Black
2008-06-12X86: Make pushes and pops use the stack size instead of the data size.Gabe Black
2008-06-12X86: In non 64bit mode, throw a fault when a NULL segment is accessed.Gabe Black
2008-06-12X86: Take advantage of the new meta register.Gabe Black
2008-06-12X86: Keep handy values like the operating mode in one register.Gabe Black
2008-06-12X86: Change what the microop chks does.Gabe Black
Instead of computing the segment descriptor address, this now checks if a selector value/descriptor are legal for a particular purpose.
2008-06-12X86: Add a microop to read a segments attribute register.Gabe Black
2008-06-12X86: Add microops and supporting code to manipulate the whole rflags register.Gabe Black
2008-06-12X86: Add microops which panic, fatal, warn, and warn_once.Gabe Black
2008-06-12X86: Truncate descriptors to 16 bits.Gabe Black
2008-06-12X86: Redo BSF.Gabe Black
2008-06-12X86: Flesh out 3dnow instruction decoding a bit and grab the byte immediate.Gabe Black
2008-06-12X86: Make string instructions work when rcx=0.Gabe Black
2008-06-12X86: Have all 8 machine check registers since the kernel assumes they're there.Gabe Black
2008-06-12X86: Bypass unaligned access support for register addressed MSRs.Gabe Black
2008-06-12X86: Remove enforcement of APIC register access alignment. Panic if more ↵Gabe Black
than one register is accessed at a time.
2008-06-12X86: Fix the implementation of BSF.Gabe Black
2008-06-12X86: Bit scan forward/reverse were accidentally transposed.Gabe Black
2008-06-12X86: Fix a byte register indexing issue in the sign extending move from ↵Gabe Black
memory microcode.
2008-06-12X86: Add in some support for the tsc register.Gabe Black
2008-06-11X86: Fix building on *BSD hostsAli Saidi
2008-06-11SCons: Fix more SCons version issuesAli Saidi
2008-05-20SCons: Fixing SCons bug 2006 issues for non-alpha ISAsStephen Hines
--HG-- extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
2008-03-25X86: Start implementing the south bridge stuff.Gabe Black
--HG-- extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
2008-03-06X86: Refine the local APIC.Gabe Black
--HG-- extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2
2008-03-01X86: Don't map the local APIC into the physical address space in SE mode.Gabe Black
--HG-- extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208
2008-02-26X86: Put in initial implementation of the local APIC.Gabe Black
--HG-- extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
2008-02-26X86: Implement the INVLPG instruction and the TIA microop.Gabe Black
--HG-- extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
--HG-- extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
2008-02-26X86: Get PCI config space to work, and adjust address space prefix numbering ↵Gabe Black
scheme. --HG-- extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
2008-02-06Make the Event::description() a const functionStephen Hines
--HG-- extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-05Add base ARM code to M5Stephen Hines
--HG-- extra : convert_revision : d811bf87d1a0bfc712942ecd3db1b48fc75257af
2008-01-23X86: Put an SMBios/DMI table in memory.Gabe Black
This is basically just the header right now, but there's an untested mechanism in place to fill out the table and make sure everything is updated correctly. --HG-- extra : convert_revision : c1610c0dfa211b7e0d091a04133695d84f500a1c
2008-01-23X86: Optomize the bit scanning instruction microassembly a little. More can ↵Gabe Black
be done. --HG-- extra : convert_revision : 3cf6e972f0e41e3529a633ecbb31289e1bd17f0f
2008-01-22X86: Implement and attach the BSR and BSF instructions.Gabe Black
--HG-- extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908
2008-01-21X86: Fill out group17 in the decoder.Gabe Black
--HG-- extra : convert_revision : 66ab9c0fc3086f66e3d6d82d47964ecf406c3a8a
2008-01-21X86: Use the existing boot_osflags instead of duplicating it.Gabe Black
--HG-- extra : convert_revision : e04e438d7d261a61c52b946c23cd126ed648814a
2008-01-12X86: Redo the bit test instructions.Gabe Black
--HG-- extra : convert_revision : 433c2a9f3675ed02f3be5ce759a440f2686d2ccd
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