| Age | Commit message (Expand) | Author |
|---|
| 2015-10-12 | misc: Add explicit overrides and fix other clang >= 3.5 issues | Andreas Hansson |
| 2015-10-12 | misc: Remove redundant compiler-specific defines | Andreas Hansson |
| 2015-10-09 | isa: Add parameter to pick different decoder inside ISA | Rekai Gonzalez Alberquilla |
| 2015-10-06 | arch: clean up isa_parser error handling | Steve Reinhardt |
| 2015-10-06 | x86: implement rcpps and rcpss SSE insts | Steve Reinhardt |
| 2015-10-06 | x86: implement fild, fucomi, and fucomip x87 insts | Steve Reinhardt |
| 2015-09-30 | arm: Change TLB Software Caching | Mitch Hayenga |
| 2015-09-30 | cpu,isa,mem: Add per-thread wakeup logic | Mitch Hayenga |
| 2015-09-30 | isa,cpu: Add support for FS SMT Interrupts | Mitch Hayenga |
| 2015-09-30 | arm: SMT MPIDR Setting | Mitch Hayenga |
| 2015-09-15 | sparc: writing to tick_cmpr should not cause a panic | Palle Lyckegaard |
| 2015-08-21 | arm, mem: Remove unused CLEAR_LL request flag | Andreas Hansson |
| 2015-08-21 | cpu: Move invldPid constant from Request to BaseCPU | Andreas Hansson |
| 2015-07-20 | x86: x86 instruction-implementation bug fixes | David Hashe |
| 2015-07-20 | syscall: Add readlink to x86 with special case /proc/self/exe | David Hashe |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2015-07-17 | x86: decode instructions with vex prefix | Nilay Vaish |
| 2015-07-07 | sim: Refactor and simplify the drain API | Andreas Sandberg |
| 2015-07-07 | sim: Decouple draining from the SimObject hierarchy | Andreas Sandberg |
| 2015-07-07 | sim: Make the drain state a global typed enum | Andreas Sandberg |
| 2015-07-07 | sim: Refactor the serialization base class | Andreas Sandberg |
| 2015-07-04 | x86: Adjust the size of the values written to the x87 misc registers | Nikos Nikoleris |
| 2015-06-21 | arm: Cleanup arch headers to remove dma_device.hh dependency | Andreas Sandberg |
| 2015-06-09 | arm: Delete debug print in initialization of hardware thread | Rune Holm |
| 2015-06-09 | arm: Fix typo in ldrsh instruction name | Rune Holm |
| 2015-06-07 | arch: fix build under MacOSX | Ruslan Bukin ext:(%2C%20Zhang%20Guoye) |
| 2015-06-01 | kvm, arm: Add support for aarch64 | Andreas Sandberg |
| 2015-06-01 | kvm, arm, dev: Add an in-kernel GIC implementation | Andreas Sandberg |
| 2015-06-01 | kvm, arm: Move ARM-specific files to arch/arm/kvm/ | Andreas Sandberg |
| 2015-05-26 | arm: implement the CONTEXTIDR_EL2 system reg. | Curtis Dunham |
| 2015-05-26 | arm: Make address translation faster with better caching | Nathanael Premillieu |
| 2015-05-26 | arm: Implement some missing syscalls (SE mode) | Giacomo Gabrielli |
| 2015-05-23 | arm: Get rid of pointless have_generic_timer param | Andreas Sandberg |
| 2015-05-23 | dev, arm: Add virtual timers to the generic timer model | Andreas Sandberg |
| 2015-05-23 | dev, arm: Refactor and clean up the generic timer model | Andreas Sandberg |
| 2015-05-15 | arm: Identify table-walker requests | Andreas Hansson |
| 2015-05-15 | misc: Appease gcc 5.1 | Andreas Hansson |
| 2015-05-05 | syscall_emul: fix warn_once behavior | Steve Reinhardt |
| 2015-05-05 | arm: Add missing FPEXC.EN check | Andreas Hansson |
| 2015-05-05 | arm: enable DCZVA by default in SE mode | Giacomo Gabrielli |
| 2015-05-05 | arm: Relax ordering for some uncacheable accesses | Andreas Sandberg |
| 2015-05-05 | mem, cpu: Add a separate flag for strictly ordered memory | Andreas Sandberg |
| 2015-05-05 | mem, alpha: Move Alpha-specific request flags | Andreas Sandberg |
| 2015-05-05 | arm: Remove unnecessary boot uncachability | Andreas Hansson |
| 2015-05-05 | arch, cpu: Do not forward snoops to table walker | Andreas Hansson |
| 2015-04-29 | arch, base, dev, kern, sym: FreeBSD support | Ruslan Bukin |
| 2015-04-29 | x86: change divide-by-zero fault to divide-error | Nilay Vaish |
| 2015-04-24 | misc: Appease gcc 5.1 without moving GDB_REG_BYTES | Andreas Hansson |
| 2015-04-23 | misc: Appease gcc 5.1 | Andreas Hansson |
