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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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Age
Commit message (
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Author
2007-07-18
Fix a comment to refer to the right type of instruction.
Gabe Black
2007-07-18
Fix the panic in the "error" format for x86,
Gabe Black
2007-07-18
Implement some forms of add.
Gabe Black
2007-07-18
Fix the operand types in a section of the decoder.
Gabe Black
2007-07-18
Make the data size used by regops overridable in the microassembly.
Gabe Black
2007-07-18
Fill out the miscreg file and add types to miscregs.hh
Gabe Black
2007-07-18
Hook x86 nop into the decoder.
Gabe Black
2007-07-18
Implement the x86 nop to be a "fault" microop which returns "NoFault".
Gabe Black
2007-07-18
Add a generateDisassembly function to the MicroFault StaticInst.
Gabe Black
2007-07-18
Make name, isMachineCheckFault, and isAlignmentFault const.
Gabe Black
2007-07-17
Calculate the correct address size.
Gabe Black
2007-07-17
Make disassembled x86 register indices reflect their size.
Gabe Black
2007-07-17
Implemented jnz.
Gabe Black
2007-07-17
Use limm to set up immediate value for subtract instruction.
Gabe Black
2007-07-17
Implement the jz instruction.
Gabe Black
2007-07-17
Make "test" set some condition codes.
Gabe Black
2007-07-17
Add in support for condition code flags.
Gabe Black
2007-07-17
Add in operand which holds the condition code bits of the flag register.
Gabe Black
2007-07-17
Add symbols for each of the flags a microop could set and each condition it c...
Gabe Black
2007-07-17
Actually include miscregs.hh
Gabe Black
2007-07-17
Create a file to describe misc registers.
Gabe Black
2007-07-17
Add a spot for the condition code portion of the flag register.
Gabe Black
2007-07-14
Move bitunion code into it's own file.
Gabe Black
2007-07-14
Pull some hard coded base classes out of the isa description.
Gabe Black
2007-06-29
fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions...
Korey Sewell
2007-06-28
o3cpu build for mips
Korey Sewell
2007-06-22
FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldO...
Korey Sewell
2007-06-22
add Control Bitfield class
Korey Sewell
2007-06-22
mips import pt. 1
Korey Sewell
2007-06-22
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2007-06-21
Make symbols for regular registers.
Gabe Black
2007-06-21
Get rid of an unnecessary include file.
Gabe Black
2007-06-21
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2007-06-21
Use the new symbols to clean up the assembler.
Gabe Black
2007-06-21
Needed for last change set to work :P
Gabe Black
2007-06-21
Define symbols for the x86 specialization of the microassembler.
Gabe Black
2007-06-21
Fix a comment.
Gabe Black
2007-06-21
Fix a problem where part of a microops parameters might be interpretted as an...
Gabe Black
2007-06-21
Add in code that lays the ground work for setting flags.
Gabe Black
2007-06-20
Implement rip relative addressing and put in some missing loads and stores.
Gabe Black
2007-06-20
Fix a newly introduced bug where the predecoder wasn't picking up all the dis...
Gabe Black
2007-06-20
X86 probably doesn't need a window save area.
Gabe Black
2007-06-20
Fix a typo in one of the operand type tags.
Gabe Black
2007-06-20
Comment out some unnecessary debug output.
Gabe Black
2007-06-20
Forgot to check these in...
Gabe Black
2007-06-20
Comment out some unnecessary debug statements.
Gabe Black
2007-06-20
Make memory instructions work better, add more macroop implementations, add a...
Gabe Black
2007-06-19
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2007-06-19
More faithfulness to what instructions should work in what modes, and added t...
Gabe Black
2007-06-19
Make branches work by repopulating the predecoder every time through. This is...
Gabe Black
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