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AgeCommit message (Expand)Author
2010-08-23X86: Make the x86 ExtMachInst serializable with (UN)SERIALIZE_SCALAR.Gabe Black
2010-08-23X86: Define a noop ExtMachInst.Gabe Black
2010-08-23X86: Mark serializing macroops and regular instructions as such.Gabe Black
2010-08-23X86: Add a .serializing directive that makes a macroop serializing.Gabe Black
2010-08-23X86: Consolidate extra microop flags into one parameter.Gabe Black
2010-08-23ARM: Improve printing of uop disassembly.Min Kyu Jeong
2010-08-23ARM: Clean up flattening for SPSR addingMin Kyu Jeong
2010-08-23ARM: Implement DBG instruction that doesn't do much for now.Gene Wu
2010-08-23MEM: Make CLREX a first class request operation and clear locks in caches whe...Gene Wu
2010-08-23ARM: Make sure that software prefetch instructions can't change the state of ...Gene Wu
2010-08-23ARM: Don't write tracedata on writes, it might have been freed already.Gene Wu
2010-08-23ARM: Implement CLREX init/complete acc methodsGene Wu
2010-08-23ARM: Fix Uncachable TLB requests and decoding of xn bitGene Wu
2010-08-23ARM: For non-cachable accesses set the UNCACHABLE flagGene Wu
2010-08-23ARM: Implement DSB, DMB, ISBGene Wu
2010-08-23ARM: Get SCTLR TE bit from reset SCTLRGene Wu
2010-08-23ARM: Implement CLREXGene Wu
2010-08-23ARM: BX instruction can be contitional if last instruction in a IT blockGene Wu
2010-08-23ARM: mark msr/mrs instructions as SerializeBefore/AfterMin Kyu Jeong
2010-08-23ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.Min Kyu Jeong
2010-08-23ARM: adding genMachineCheckFault() stub for ARM that doesn't panicMin Kyu Jeong
2010-08-23ARM: DFSR status value for sync external data abort is expected to be 0x8 in ...Gene Wu
2010-08-23ARM: Temporary local variables can't conflict with isa parser operands.Gene Wu
2010-08-23ARM: Exclusive accesses must be double word alignedAli Saidi
2010-08-23ARM: Add some registers for big loads/stores to support neon.Ali Saidi
2010-08-23ARM: Decode neon memory instructions.Ali Saidi
2010-08-23ARM: Clean up the ISA desc portion of the ARM memory instructions.Gabe Black
2010-08-23ARM: We don't currently support ThumbEE exceptions, so don't report that we doAli Saidi
2010-08-23ARM: Add system for ARM/Linux and bootstrappingAli Saidi
2010-08-23ARM: Implement some more misc registersAli Saidi
2010-08-23ARM: Fix an un-initialized variable bugAli Saidi
2010-08-23Loader: Make the load address mask be a parameter of the system rather than a...Ali Saidi
2010-08-23ARM: Finish the timing translation when taking a fault.Min Kyu Jeong
2010-08-23ARM: Use a stl queue for the table walker stateDam Sunwoo
2010-08-23Compiler: Fixes for GCC 4.5.Ali Saidi
2010-08-22X86: Get rid of unused file arguments.hh.Gabe Black
2010-08-22SPARC: Fix some style issues in utility.hh.Gabe Black
2010-08-22X86: Get rid of the unused getAllocator on the python base microop class.Gabe Black
2010-08-17x86: minor checkpointing bug fixesSteve Reinhardt
2010-08-17sim: revamp unserialization procedureSteve Reinhardt
2010-08-13CPU: Tidy up endianness handling for mmapped "IPR"s.Gabe Black
2010-07-22Power: The condition register should be set or cleared upon a system callTimothy M. Jones
2010-07-22Power: Provide a utility function to copy registers from one thread contextTimothy M. Jones
2010-07-21Fix x86 XCHG macro-op to use locked micro-ops for all memory accessesTushar Krishna
2010-07-15ARM: Make an SRS instruction with a bad mode cause an undefined instruction f...Gabe Black
2010-07-13ARM: Adjust the FP_Base_DepTag to be larger than the largest int reg index.Gabe Black
2010-06-25X86: Fix div2 flag calculation.Gabe Black
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-14stats: get rid of the never-really-used event stuffNathan Binkert
2010-06-03More minor gdb-related cleanup.Steve Reinhardt