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2010-10-22X86: Implement genMachineCheckFault.Gabe Black
Even though this shouldn't ever be used, it might get called speculatively and shouldn't panic.
2010-10-22X86: Make syscall instructions non-speculative in SE.Gabe Black
2010-10-22ISA: Simplify various implementations of completeAcc.Gabe Black
2010-10-22ARM: Don't pretend to writeback registers in initiateAcc.Gabe Black
2010-10-16Mem: Reclaim some request flags used by MIPS for alignment checking.Gabe Black
These flags were being used to identify what alignment a request needed, but the same information is available using the request size. This change also eliminates the isMisaligned function. If more complicated alignment checks are needed, they can be signaled using the ASI_BITS space in the flags vector like is currently done with ARM.
2010-10-15GetArgument: Rework getArgument so that X86_FS compiles again.Gabe Black
When no size is specified for an argument, push the decision about what size to use into the ISA by passing a size of -1.
2010-10-14SPARC: Get rid of the copy/pasted StackTrace stolen from Alpha.Gabe Black
2010-10-13Mem: Change the CLREX flag to CLEAR_LL.Gabe Black
CLREX is the name of an ARM instruction, not a name for this generic flag.
2010-10-10X86: Detect attempts to load a 32 bit kernel and panic.Gabe Black
2010-10-10SPARC: Make SPARC's ISA's clear function initialize everything it should.Gabe Black
Also make it not set some pointers to NULL potentially introducing a memory leak. That should be done in the constructor.
2010-10-10Alpha: Force all the IPRs to an initial, determinstic value when cleared.Gabe Black
2010-10-10Alpha: Initialize the data TLB mode IPR.Gabe Black
2010-10-04Alpha: Fix Alpha NumMiscArchRegs constant.Gabe Black
Also add asserts in O3's Scoreboard class to catch bad indexes.
2010-10-01Power: Fix compile error from previous push.Ali Saidi
2010-10-01ARM: Make the TLB a little bit faster by moving most recently used items to ↵Ali Saidi
front of list
2010-10-01ARM: Implement functional virtual to physical address translationAli Saidi
for debugging and program introspection.
2010-10-01Debug: Implement getArgument() and function skipping for ARM.Ali Saidi
In the process make add skipFuction() to handle isa specific function skipping instead of ifdefs and other ugliness. For almost all ABIs, 64 bit arguments can only start in even registers. Size is now passed to getArgument() so that 32 bit systems can make decisions about register selection for 64 bit arguments. The number argument is now passed by reference because getArgument() will need to change it based on the size of the argument and the current argument number. For ARM, if the argument number is odd and a 64-bit register is requested the number must first be incremented to because all 64 bit arguments are passed in an even argument register. Then the number will be incremented again to access both halves of the argument.
2010-10-01ARM: Clean up use of TBit and JBit.Ali Saidi
Rather tha constantly using ULL(1) << PcXBitShift define those directly. Additionally, add some helper functions to further clean up the code.
2010-09-29X86: Fix the RIP relative versions of the BT, BTC, BTR, and BTS instructions.Gabe Black
2010-09-14X86: Make the halt microop non-speculative.Gabe Black
Executing this microop makes the CPU halt even if it was misspeculated.
2010-09-14X86: Make unrecognized instructions behave better in x86.Gabe Black
2010-09-14CPU: Trim unnecessary includes from some common files.Gabe Black
This reduces the scope of those includes and makes it less likely for there to be a dependency loop. This also moves the hashing functions associated with ExtMachInst objects to be with the ExtMachInst definitions and out of utility.hh.
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
Also move the "Fault" reference counted pointer type into a separate file, sim/fault.hh. It would be better to name this less similarly to sim/faults.hh to reduce confusion, but fault.hh matches the name of the type. We could change Fault to FaultPtr to match other pointer types, and then changing the name of the file would make more sense.
2010-09-10style: fix sorting of includes and whitespace in some filesNathan Binkert
2010-08-31ARM: Get rid of the checkFpEnableFault function in ARM.Gabe Black
2010-08-31Alpha: Alpha's mt.hh was including mips header files.Gabe Black
2010-08-27X86: Change the copyright holder to AMD.Gabe Black
I accidentally left myself as a placeholder copyright holder on this file when I checked it in. Copyright should be assigned to AMD.
2010-08-25ARM: Support unaligned memory access.Min Kyu Jeong
Without this flag set, page-crossing requests were not split into two mem request. Depending on the alignment bit in the SCTLR, misaligned access could raise a fault. However it seems unnecessary to implement that.
2010-08-25ARM: Seperate the queues of L1 and L2 walker states.Gene WU
2010-08-25ARM: Adding a bogus fault that does nothing.Min Kyu Jeong
This fault can used to flush the pipe, not including the faulting instruction. The particular case I needed this was for a self-modifying code. It needed to drain the store queue and force the following instruction to refetch from icache. DCCMVAC cp15 mcr instruction is modified to raise this fault.
2010-08-25ARM: Remove ALPHA KSeg functions.William Wang
These were erronously copied years ago into the ARM directory.
2010-08-25ARM: Limited implementation of dprintk.Ali Saidi
Does not work with vfp arguments or arguments passed on the stack.
2010-08-25ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)Min Kyu Jeong
When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path
2010-08-25ARM: Make VMSR, RFE PC/LR etc non speculative, and serializingAli Saidi
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
Allow some loads that update the base register to use just two micro-ops. three micro-ops are only used if the destination register matches the offset register or the PC is the destination regsiter. If the PC is updated it needs to be the last micro-op otherwise O3 will mispredict.
2010-08-25ARM: Set the high bits in the part number so it's considered new by some code.Ali Saidi
2010-08-25ARM: Fix VFP enabled checks for mem instructionsAli Saidi
2010-08-25ARM: Seperate out the renamable bits in the FPSCR.Gabe Black
2010-08-25ARM: Eliminate some unused enums.Gabe Black
2010-08-25ARM: Fix type comparison warnings in Neon.Gabe Black
2010-08-25ARM: Implement CPACR register and return Undefined Instruction when FP ↵Gabe Black
access is disabled.
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-25ARM: Expand the mode checking utility functions.Gabe Black
inUserMode now can take either a threadcontext or a CPSR value directly. If given a thread context it just extracts the CPSR and calls the other version. An inPrivelegedMode function was also implemented which just returns the opposite of inUserMode.
2010-08-23X86: Create a directory for files that define register indexes.Gabe Black
This is to help tidy up arch/x86. These files should not be used external to the ISA. --HG-- rename : src/arch/x86/apicregs.hh => src/arch/x86/regs/apic.hh rename : src/arch/x86/floatregs.hh => src/arch/x86/regs/float.hh rename : src/arch/x86/intregs.hh => src/arch/x86/regs/int.hh rename : src/arch/x86/miscregs.hh => src/arch/x86/regs/misc.hh rename : src/arch/x86/segmentregs.hh => src/arch/x86/regs/segment.hh
2010-08-23Power: Get rid of unused checkFpEnableFault.Gabe Black
This function was brought in from another ISA and doesn't actually do anything or get used.
2010-08-23ISA: Get rid of old, unused utility functions cluttering up the ISAs.Gabe Black
2010-08-23X86: Get rid of the flagless microop constructor.Gabe Black
This will reduce clutter in the source and hopefully speed up compilation.
2010-08-23X86: Make the TLB fault instead of panic when something is unmapped in SE mode.Gabe Black
The fault object, if invoked, would then panic. This is a bit less direct, but it means speculative execution won't panic the simulator.
2010-08-23X86: Make the x86 ExtMachInst serializable with (UN)SERIALIZE_SCALAR.Gabe Black
--HG-- rename : src/arch/x86/types.hh => src/arch/x86/types.cc
2010-08-23X86: Define a noop ExtMachInst.Gabe Black