| Age | Commit message (Expand) | Author |
|---|
| 2017-12-01 | arm: Enable ns registers access in secure mode | Giacomo Travaglini |
| 2017-11-30 | arch-riscv: use sext rather than manual masks | Alec Roelke |
| 2017-11-30 | arch-riscv: Remove spaces around ea_code | Alec Roelke |
| 2017-11-29 | arch-riscv: Add missing license paragraphs | Alec Roelke |
| 2017-11-29 | arch-riscv: Remove static parts of AMOs out of ISA | Alec Roelke |
| 2017-11-29 | arch-riscv: Move parts of mem insts out of ISA | Alec Roelke |
| 2017-11-29 | arch-riscv: Move unknown out of ISA description | Alec Roelke |
| 2017-11-29 | arch-riscv: Move standard ops out of ISA | Alec Roelke |
| 2017-11-28 | arch-arm: Add haveEL pseudocode function | Giacomo Travaglini |
| 2017-11-28 | arch-arm: Add assertions when extracting an ArmSystem from a TC | Giacomo Travaglini |
| 2017-11-28 | arch-riscv: Move static_inst into a directory | Alec Roelke |
| 2017-11-22 | arch-arm: Add support for the brk instruction | Andreas Sandberg |
| 2017-11-22 | arch-arm: HVC instruction undefined in secure EL1 | Giacomo Travaglini |
| 2017-11-22 | arch-riscv: Add missing system calls | Alec Roelke |
| 2017-11-22 | sparc: Move integer StaticInst base classes out of the ISA desc. | Gabe Black |
| 2017-11-22 | sparc: Move the mem base classes out of the ISA description. | Gabe Black |
| 2017-11-22 | sparc: Move the microop/macroop base classes out of the ISA desc. | Gabe Black |
| 2017-11-22 | sparc: Return debug faults from unimplemented instructions. | Gabe Black |
| 2017-11-22 | sparc: Pull the unimplemented formats out of the ISA description. | Gabe Black |
| 2017-11-22 | sparc: Pull the "Uknown" StaticInst class out of the ISA description. | Gabe Black |
| 2017-11-22 | sparc: Pull most of the Nop format out of the ISA description. | Gabe Black |
| 2017-11-22 | sparc: Pull more StaticInst base classes out of the ISA desc. | Gabe Black |
| 2017-11-22 | sparc: Pull flat static instruction classes out of the ISA. | Gabe Black |
| 2017-11-21 | arch-arm: ArmPMU refactor | Jose Marinho |
| 2017-11-21 | arch-arm: Do not increment PMU cycle event in WFI/WFE | Jose Marinho |
| 2017-11-21 | arch-arm: Fix MCR/MRC disassemble | Giacomo Travaglini |
| 2017-11-21 | arch-arm: Fix MSR/MRS disassemble | Giacomo Travaglini |
| 2017-11-20 | arch-arm: Ensure counters keep events on checkpoint resume | Jose Marinho |
| 2017-11-20 | sparc: Pull StaticInst base classes out of the ISA description. | Gabe Black |
| 2017-11-17 | sim: Implement load_addr_mask auto-calculation | Geoffrey Blake |
| 2017-11-16 | arch, arm: Print value being ignored on DummyISA write | Sean McGoogan |
| 2017-11-15 | arch-arm: Dsb instruction shouldn't flush the pipeline | Giacomo Travaglini |
| 2017-11-15 | arch-arm: Writes to DCCMVAC shouldn't flush pipeline | Giacomo Travaglini |
| 2017-11-15 | arch-arm: Removing FlushPipe fault, using SquashAfter | Giacomo Travaglini |
| 2017-11-15 | arm: Add support for armv8 CRC32 instructions | Giacomo Travaglini |
| 2017-11-13 | arch-arm: Interface for the ArmStaticInst intWidth field | Giacomo Travaglini |
| 2017-11-13 | arch-arm: Corrected encoding for T32 HVC instruction | Giacomo Travaglini |
| 2017-11-10 | scons: Move Transform and termcap functionality into their own files. | Gabe Black |
| 2017-11-09 | arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1 | Nikos Nikoleris |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-10-31 | x86: Fix VEX instruction decoding. | Gabe Black |
| 2017-10-20 | arch-arm: RBIT instruction using mirroring func | Giacomo Travaglini |
| 2017-10-17 | scons: Stop generating inc.d in the isa parser. | Gabe Black |
| 2017-10-17 | arch-arm: Fix inverted 32/64-bit check in GDB | Boris Shingarov |
| 2017-10-13 | arch-arm: Signal an event when executing store exclusives | Nikos Nikoleris |
| 2017-10-13 | mem: Signal the local monitor when clearing the global monitor | Nikos Nikoleris |
| 2017-09-27 | arch-x86: fix CondInst decoding for MOV to Control Registers | Bjoern A. Zeeb |
| 2017-09-27 | arch: change panic for Vector traceData to warn_once | Bjoern A. Zeeb |
| 2017-09-21 | alpha: Move some initialization logic from loadState into unserialize. | Gabe Black |
