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2007-03-05Added missing include.Gabe Black
--HG-- extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
2007-03-05Added LargestRead type for x86. I might have picked the wrong type.Gabe Black
--HG-- extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
2007-03-05Stub implementation for x86.Gabe Black
--HG-- extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
2007-03-05Stub implementation for x86Gabe Black
--HG-- extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
2007-03-05Added fault generation functions. I would still like to see these go away. ↵Gabe Black
The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures. --HG-- extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
2007-03-05Added stub implementations or prototypes for all the functions in this file.Gabe Black
--HG-- extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
2007-03-05Added in a missing include.Gabe Black
--HG-- extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
2007-03-05Filled in a stub header file for setting the result of a syscall.Gabe Black
--HG-- extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
2007-03-05Filled in a stub header file for a stacktrace object. I'm still not sure ↵Gabe Black
what this is for, and it probably doesn't work on anything but Alpha. --HG-- extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
2007-03-05Filled in a stub header file for remote gdbGabe Black
--HG-- extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
2007-03-05Correct a typoGabe Black
--HG-- extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
2007-03-05Make the constructor (and all the other functions) publicGabe Black
--HG-- extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
2007-03-05Various touch upsGabe Black
--HG-- extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
2007-03-05Added a missing include.Gabe Black
--HG-- extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
2007-03-05Added a missing include.Gabe Black
--HG-- extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
2007-03-05Fix up the remote gdb include gaurds so it doesn't use the same symbol as ↵Gabe Black
Alpha does. --HG-- extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
2007-03-05x86 register file includes.Gabe Black
--HG-- extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
2007-03-05Include the x86 specific traits file.Gabe Black
--HG-- extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
2007-03-05Stub x86 Fault class which just panics.Gabe Black
--HG-- extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
2007-03-05A new file for x86 specific parameters. This could be implemented as a sim ↵Gabe Black
object? --HG-- extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
2007-03-05Add in a declaration of class Checkpoint rather than expecting it to come ↵Gabe Black
from some other include. --HG-- extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
2007-03-05Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
2007-03-04Don't use the exact same name as a system header #defineNathan Binkert
--HG-- extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
2007-03-03Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03Filled in with basic x86 stuff. Some things are missing, wrong, or ↵Gabe Black
nonsensical for x86. --HG-- extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39
2007-03-03Filled in with basic x86 information. Some things are missing, wrong, or ↵Gabe Black
non-sensical in x86. --HG-- extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
2007-03-03Add build hooks for x86.Gabe Black
--HG-- extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
2007-03-03Implement the _llseek syscall. It's Linux only, so we'll actually use the ↵Gabe Black
lseek syscall. --HG-- extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
2007-03-03Fix some issues with 32 bit processes.Gabe Black
--HG-- extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way ↵Ali Saidi
as the twin 64 bit loads src/arch/isa_parser.py: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/operands.isa: src/base/bigint.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/mem/packet_access.hh: make ldtw(a) Twin 32 bit load work correctly --HG-- extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42
2007-03-02Forgot to commit this new file last earlier.Gabe Black
--HG-- extra : convert_revision : f2d80ae551b7e29426141d5c9fe355b43a0b9c7d
2007-02-28Make the m5 psuedo instructions use the BasicOperate formatGabe Black
--HG-- extra : convert_revision : f02da702ab9b99da124fac7e10a07386b04f3a0f
2007-02-28Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32 --HG-- extra : convert_revision : 88d1401f6e6b7c82344abef2c81b3c22bf6a0499
2007-02-28Make trap instructions always generate TrapInstruction Fault objects which ↵Gabe Black
call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running. --HG-- extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94
2007-02-28The "hostname" variable isn't used in the process classes. It should be ↵Gabe Black
removed from the other ones as well. --HG-- extra : convert_revision : 0c07534de42d6c32ac26d9e43709111e3ab30d57
2007-02-24Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : a4f80ce975a23ba9858e6bf2dbbfed8897dd1810
2007-02-24make m5 readfile work on solaris... we can have a solaris regression soon!Ali Saidi
src/arch/sparc/isa/decoder.isa: add readfile and break to sparc decoder src/arch/sparc/isa/operands.isa: fix O0-O5 operands registers util/m5/Makefile.sparc: Make sparc makefile compile a 64bit binary util/m5/m5.c: readfile was in here twice, once will be sufficient I think util/m5/m5op_sparc.S: implement readfile and debugbreak --HG-- extra : convert_revision : 139b3f480ee6342b37b5642e072c8486d91a3944
2007-02-23Ali and I both made the same change and we only need it once. I liked mine a ↵Gabe Black
little better. --HG-- extra : convert_revision : 3a1b7856e6143ca089fd6e36492608377dfede19
2007-02-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32 --HG-- extra : convert_revision : a7697ea8457a03318e3fcf34775bf3ecc4786e8a
2007-02-22Make the m5 pseudo instructions only work in FS. Also, make sure any ↵Gabe Black
undefined opcodes in impdep2 (which in SE is all of them) trap with an illegal_instruction exception. --HG-- extra : convert_revision : dd7848d0685e4cc6f5fd5e3b846a3f70b62ee30a
2007-02-22fix se compiling oopsAli Saidi
--HG-- extra : convert_revision : ce7ac94da0ed6bad457a8a9e4c949b0c3b09c2ae
2007-02-21Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 4105ebbeca59206bece27f229ee810d594fb4310
2007-02-21add pseduo instruction support for sparcAli Saidi
util/m5/Makefile.alpha: Clean up to make it a bit easier to muck with util/m5/Makefile.alpha: Make the makefile more reasonable util/m5/Makefile.alpha: Remove authors from copyright. util/m5/Makefile.alpha: Updated Authors from bk prs info util/m5/Makefile.alpha: bk cp Makefile Makefile.alpha src/arch/sparc/tlb.cc: Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate src/arch/alpha/isa/decoder.isa: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: Rename AlphaPseudo -> PseudoInst since it's all generic src/arch/sparc/isa/bitfields.isa: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/includes.isa: src/arch/sparc/isa/operands.isa: Add support for pseudo instructions in sparc util/m5/Makefile.alpha: util/m5/Makefile.sparc: split off alpha make file and sparc make file for m5 app util/m5/m5.c: ivle and ivlb aren't used anymore util/m5/m5op.h: stdint seems like a more generic better fit here util/m5/m5op_alpha.S: move the op ids into their own header file since we can share them between sparc and alpha --HG-- rename : util/m5/Makefile => util/m5/Makefile.sparc rename : util/m5/m5op.S => util/m5/m5op_alpha.S extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
2007-02-21Fix compile issues on gcc 4.1.x related to namespaces.Nathan Binkert
This basically involves moving the builder code outside of any namespace. While we're at it, move a few braces outside of a couple #if/#else/#endif blocks so it's easier to match up the braces. --HG-- extra : convert_revision : a7834532aadc63b0e0ff988dd5745049e02e6312
2007-02-21#include needed for compileNathan Binkert
--HG-- extra : convert_revision : fda9ab0d04f77f27810018a8639d6ea8abb59326
2007-02-18implement vtophys and 32bit gdb supportAli Saidi
src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/sparc/arguments.hh: move Copy* to vport since it's generic for all the ISAs src/arch/sparc/isa_traits.hh: the Solaris kernel sets up a virtual-> real mapping for all memory starting at SegKPMBase src/arch/sparc/pagetable.hh: add a class for getting bits out of the TteTag src/arch/sparc/remote_gdb.cc: add 32bit support kinda.... If its 32 bit src/arch/sparc/remote_gdb.hh: Add 32bit register offsets too. src/arch/sparc/tlb.cc: cleanup generation of tsb pointers src/arch/sparc/tlb.hh: add function to return tsb pointers for an address make lookup public so vtophys can use it src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: write vtophys for sparc src/base/bitfield.hh: return a mask of bits first->last src/mem/vport.cc: src/mem/vport.hh: move Copy* here since it's ISA generic --HG-- extra : convert_revision : c42c331e396c0d51a2789029d8e232fe66995d0f
2007-02-15fixup remote gdb support for sparc fsAli Saidi
--HG-- extra : convert_revision : 5edf0ad492fe438d66bcf0ae469ef841cd71e157
2007-02-13Update MIPS ISA description to work with new write result interfaceSteve Reinhardt
for store conditional. --HG-- extra : convert_revision : 73efd2ca17994e0e19c08746441874a2ac8183af
2007-02-13fix compiling problemsAli Saidi
--HG-- extra : convert_revision : 9ecfd5a0a151c03503e42faf98240da12fd719b1
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