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AgeCommit message (Expand)Author
2014-03-16kvm: x86: Add support for x86 INIT and STARTUP handlingAndreas Sandberg
2014-03-12alpha: Small removal of dead comments/code from alpha ISAPaul Rosenfeld
2014-03-07arm: Handle functional TLB walks properlyGeoffrey Blake
2014-03-07scons: Fixes uninitialized warnings issued by clangMitch Hayenga
2014-03-07arm: Fix uninitialised warning with gcc 4.8Stephan Diestelhorst
2014-03-07mem: Wakeup sleeping CPUs without caches on LLSCAli Saidi
2014-03-03x86: Setup correct TSL/TR segment attributes on INITAndreas Sandberg
2014-03-01cpu: Enable fast-forwarding for MIPS InOrderCPU and O3CPUChristopher Torng
2014-02-05x86: Fix x87 state transfer bugAndreas Sandberg
2014-02-02x86, kvm: Fix bug in the RFlags get and set functionsNikos Nikoleris
2014-01-28arm: Enable umask syscall in SE modeMitch Hayenga
2014-01-27x86: use lfpimm instead of limm for fptanNilay Vaish
2014-01-27x86: implements x87 add/sub instructionsNilay Vaish
2014-01-27x86: implements fxch instruction.Nilay Vaish
2014-01-27x86: correct error in emms instruction.Nilay Vaish
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2014-01-24arch: Make all register index flattening constAndreas Hansson
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2014-01-24cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...Ali Saidi
2014-01-24mem: Remove explict cast from memhelper.Ali Saidi
2014-01-24mem: per-thread cache occupancy and per-block agesDam Sunwoo
2014-01-24x86: Fix memory leak in table walkerAndreas Hansson
2013-12-29mips: Floating point convert bug fixChristopher Torng
2013-11-26x86: Implementation of Int3 and Int_Ib in long modeChristian Menard
2013-10-31ARM: add support for TEEHBR accessChander Sudanthi
2013-10-31mem: Add privilege info to request classPrakash Ramrakhyani
2013-10-17arm: Accomodate function name changes in newer linux kernelsEric Van Hensbergen
2013-10-15arch/x86: add support for explicit CC register fileYasuko Eckert
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15isa: clean up register constantsSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-10-15mem: Rename the ASI_BITS flag field in RequestAndreas Sandberg
2013-10-15mem: Use a flag instead of address bit 63 for generic IPRsAndreas Sandberg
2013-10-07x86: enables lstat and readlink syscallsNilay Vaish
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
2013-09-30arch: Add support for m5ops using mmapped IPRsAndreas Sandberg
2013-09-30x86: Add support for FXSAVE, FXSAVE64, FXRSTOR, and FXRSTOR64Andreas Sandberg
2013-09-30x86: Add support for FLDENV & FNSTENVAndreas Sandberg
2013-09-30x86: Add support for loading 32-bit and 80-bit floats in the x87Andreas Sandberg
2013-09-30x86: Fix re-entrancy problems in x87 store instructionsAndreas Sandberg
2013-09-30x86: Add support routines to load and store 80-bit floatsAndreas Sandberg
2013-09-30x86: Add limited support for extracting function call argumentsAndreas Sandberg
2013-09-19x86: Add support routines to convert between x87 tag formatsAndreas Sandberg
2013-09-18x86: Expose the raw hash map of MSRsAndreas Sandberg
2013-09-18x86: Add support for checking the raw state of an interruptAndreas Sandberg
2013-09-18x86: Expose the interrupt vector in faultsAndreas Sandberg
2013-09-04arch: Resurrect the NOISA build target and rename it NULLAndreas Hansson
2013-09-04alpha: Move system virtProxy to Alpha onlyAndreas Hansson
2013-08-19alpha: Check interrupts before quiesceAndreas Hansson
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