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AgeCommit message (Expand)Author
2009-05-12inorder-float: Fix storage of FP resultsKorey Sewell
2009-05-12inorder-mem: skeleton support for prefetch/writehintsKorey Sewell
2009-05-12inorder-unified-tlb: use unified TLB instead of old TLB modelKorey Sewell
2009-05-12inorder/alpha-isa: create eaComp object visible to StaticInst through ISAKorey Sewell
2009-05-12inorder-bpred: edits to handle non-delay-slot ISAsKorey Sewell
2009-05-12inorder-alpha-port: initial inorder support of ALPHAKorey Sewell
2009-05-12isa-parser: made a few changes, but not author-worthyKorey Sewell
2009-04-26X86: Precompute the default and alternate address and operand size and the st...Gabe Black
2009-04-26X86: Split out the internal memory space from the regular translate() and pre...Gabe Black
2009-04-26X86: Centralize updates to the handy M5 reg.Gabe Black
2009-04-26X86: Tell the function that sends int messages who to send to instead of figu...Gabe Black
2009-04-26X86: Make the local APICs register themselves with the IO APIC.Gabe Black
2009-04-26X86: Record the initial APIC ID which identifies an APIC in M5.Gabe Black
2009-04-24SPARC: Tighten up the clone system call and SPARCs copyRegs.Gabe Black
2009-04-23X86: Put the StoreCheck flag with the others, and don't collide with other fl...Gabe Black
2009-04-21arm: include missing file for armNathan Binkert
2009-04-21arm: Unify the ARM tlb. We forgot about this when we did the rest.Nathan Binkert
2009-04-21syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.Steve Reinhardt
2009-04-21Commit m5threads package.Daniel Sanchez
2009-04-19X86: Fix the functions that manipulate large bit arrays in the local APIC.Gabe Black
2009-04-19X86: Fix up a copyright.Gabe Black
2009-04-19X86: Fix how the TLB handles the storecheck flag.Gabe Black
2009-04-19X86: Recognize and handle the lock legacy prefix.Gabe Black
2009-04-19X86: Implement a locking version of XADD.Gabe Black
2009-04-19X86: Implement a locking version of BTC.Gabe Black
2009-04-19X86: Implement a locking version of BTR.Gabe Black
2009-04-19X86: Implement a locking version of CMPXCHG.Gabe Black
2009-04-19X86: Implement a locking version of BTS.Gabe Black
2009-04-19X86: Implement a locking version of DEC.Gabe Black
2009-04-19X86: Implement a locking version of INC.Gabe Black
2009-04-19X86: Implement a locking version of NEG.Gabe Black
2009-04-19X86: Implement a locking version of NOT.Gabe Black
2009-04-19X86: Implement a locking version of XCHG.Gabe Black
2009-04-19X86: Implement a locking version of XOR.Gabe Black
2009-04-19X86: Implement a locking version of SUB.Gabe Black
2009-04-19X86: Implement a locking version of AND.Gabe Black
2009-04-19X86: Implement a locking version of SBB.Gabe Black
2009-04-19X86: Implement a locking version of ADC.Gabe Black
2009-04-19X86: Implement a locking version of OR.Gabe Black
2009-04-19X86: Implement a locking version of ADD.Gabe Black
2009-04-19X86: Implement the stul microop.Gabe Black
2009-04-19X86: Implement the ldstl microop.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-19SE mode: Make keeping track of the number of syscalls less hacky.Gabe Black
2009-04-19X86: Actually handle 16 bit mode modrm.Gabe Black
2009-04-19X86: Make the TEST instruction set all the flags it's supposed to.Gabe Black
2009-04-19X86: Implement broadcast IPIs.Gabe Black
2009-04-19X86: Fix the ordering of the vendor string reported by CPUID.Gabe Black
2009-04-19X86: Only recognize the first startup IPI after INIT or reset.Gabe Black
2009-04-19X86: Use recvResponse to implement the idle bit in the Local APIC ICR.Gabe Black