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AgeCommit message (Expand)Author
2018-03-14x86: Simplify the implementations of RDTSC and RDTSCP slightly.Gabe Black
2018-03-14x86: Implement the RDTSCP instruction.Gabe Black
2018-03-14x86: Mark the RDTSC instruction as .serialize_before.Gabe Black
2018-03-14x86: Replace the .serializing directive with .serialize_(before|after).Gabe Black
2018-03-14arm: Fix maybe-uninitialized GCC warningsChun-Chen Hsu
2018-03-14arch-arm: ERET from AArch64 to AArch32 ignore MSBsGiacomo Travaglini
2018-03-12arch-arm: Adding IPA-Based Invalidating instructionsGiacomo Travaglini
2018-03-12arch-arm: Implement missing aarch32 TLBI registersGiacomo Travaglini
2018-03-08sparc: Passify a new g++ warning.Gabe Black
2018-03-08arch-arm: Enable Debug IFSC when faulting to aarch64 modeGiacomo Travaglini
2018-03-08arch-arm: Fix FSC generation in AbortFaultGiacomo Travaglini
2018-03-08arch-arm: Introduce update method in ArmFault classGiacomo Travaglini
2018-03-08arch-arm: Fix PCAlignmentFault routing to HypervisorGiacomo Travaglini
2018-03-06scons: Switch from the print statement to the print function.Gabe Black
2018-03-06arm: Remove ignored const qualifierSiddhesh Poyarekar
2018-02-24sparc: Fix FS Checkpoint loadingKhalique
2018-02-20arch-arm: Make hlt64 a mem barrier with semihostingGiacomo Travaglini
2018-02-20arch-arm: Add AArch32 HLT Semihosting interfaceGiacomo Travaglini
2018-02-20arch-arm: Add AArch32 SVC Semihosting interfaceGiacomo Travaglini
2018-02-20arch-arm: Adding isa templates for semihosting opsGiacomo Travaglini
2018-02-20arch-arm: HLT using immediate when checking for semihostingGiacomo Travaglini
2018-02-20arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassemblyGiacomo Travaglini
2018-02-19arch-riscv: Fix compressed branch op offsetAlec Roelke
2018-02-19arch-arm: Semihosting not available in syscall emulationGiacomo Travaglini
2018-02-19arch-arm: Add support for secure state in semihostingAndreas Sandberg
2018-02-19arch-arm: Add aarch64 semihosting supportAndreas Sandberg
2018-02-16arch-arm: IMPLEMENTATION DEFINED registerGiacomo Travaglini
2018-02-16arch-arm: Arch regs and pseudo regs distinctionGiacomo Travaglini
2018-02-16arch-arm: Fix syntax error in TLB::getResultTeChuan Zhu
2018-02-16arch-arm: Fix big endian support in {Load,Store}Double64Chuan Zhu
2018-02-16arch-arm: Fix big endian support in do{Long,L1,L2}DescriptorChuan Zhu
2018-02-16arch-arm: Add support for automatic reset addr selectionAndreas Sandberg
2018-02-16arch-arm: Change ArmFault cast from reinterpret to staticGiacomo Travaglini
2018-02-16arch-arm: Decode Brk64 instructionsAndreas Sandberg
2018-02-16arch-arm: Fix Secure state check in checkFPAdvSIMDTrap64Chuan Zhu
2018-02-13sim: Make Stats truly non-copy-constructibleRekai Gonzalez-Alberquilla
2018-02-09sim: Remove _numContexts member in System classGiacomo Travaglini
2018-02-08arch-arm: Correct SecureMonitorTrap vals for aarch32Giacomo Travaglini
2018-02-08arch-arm: Fixed error in choosing vector offsetChuan Zhu
2018-02-08arch-arm: Don't change PSTATE in Illegal Exception returnGiacomo Travaglini
2018-02-08arch-arm: Handle route to EL2 in Supervisor TrapChuan Zhu
2018-02-07arch-arm: Change the type of fault for dc ivac instructionsNikos Nikoleris
2018-02-07arch-arm: Unify permission checks for dc * instructionsNikos Nikoleris
2018-02-07arch-arm: Check cache maintenance insts for permission faultsNikos Nikoleris
2018-02-07arch-arm: Turn dc ivac to dc civac when some conditions are metNikos Nikoleris
2018-02-07arch-arm: Fix printing of the data cache maintenance instructionsNikos Nikoleris
2018-02-07arch-arm: Fix cache line size for cache maintenace instNikos Nikoleris
2018-02-07arch-arm: Fault when dc ivac is executed from EL0Nikos Nikoleris
2018-02-07arch-arm: Change function name for banked miscregsGiacomo Travaglini
2018-02-07arch-arm: Fix AArch32 SETEND InstructionGiacomo Travaglini
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