summaryrefslogtreecommitdiff
path: root/src/arch
AgeCommit message (Collapse)Author
2010-08-17sim: revamp unserialization procedureSteve Reinhardt
Replace direct call to unserialize() on each SimObject with a pair of calls for better control over initialization in both ckpt and non-ckpt cases. If restoring from a checkpoint, loadState(ckpt) is called on each SimObject. The default implementation simply calls unserialize() if there is a corresponding checkpoint section, so we get backward compatibility for existing objects. However, objects can override loadState() to get other behaviors, e.g., doing other programmed initializations after unserialize(), or complaining if no checkpoint section is found. (Note that the default warning for a missing checkpoint section is now gone.) If not restoring from a checkpoint, we call the new initState() method on each SimObject instead. This provides a hook for state initializations that are only required when *not* restoring from a checkpoint. Given this new framework, do some cleanup of LiveProcess subclasses and X86System, which were (in some cases) emulating initState() behavior in startup via a local flag or (in other cases) erroneously doing initializations in startup() that clobbered state loaded earlier by unserialize().
2010-08-13CPU: Tidy up endianness handling for mmapped "IPR"s.Gabe Black
2010-07-22Power: The condition register should be set or cleared upon a system callTimothy M. Jones
return to indicate success or failure.
2010-07-22Power: Provide a utility function to copy registers from one thread contextTimothy M. Jones
to another in the Power ISA.
2010-07-21Fix x86 XCHG macro-op to use locked micro-ops for all memory accessesTushar Krishna
2010-07-15ARM: Make an SRS instruction with a bad mode cause an undefined instruction ↵Gabe Black
fault.
2010-07-13ARM: Adjust the FP_Base_DepTag to be larger than the largest int reg index.Gabe Black
2010-06-25X86: Fix div2 flag calculation.Gabe Black
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-14stats: get rid of the never-really-used event stuffNathan Binkert
2010-06-03More minor gdb-related cleanup.Steve Reinhardt
Found several more stale includes and forward decls.
2010-06-03ARM: Fix issue with m5.fast and ARMAli Saidi
2010-06-02ARM: Fix SPEC2000 benchmarks in SE mode. With this patch allAli Saidi
Spec2k benchmarks seem to run with atomic or timing mode simple CPUs. Fixed up some constants, handling of 64 bit arguments, and marked a few more syscalls ignoreFunc.
2010-06-02ARM: Fix IT state not updating when an instruction memory instruction faults.Min Kyu Jeong
2010-06-02ARM: Allow multiple outstanding TLB walks to queue.Dam Sunwoo
2010-06-02ARM TLB: Fix bug in memAttrs getting a bogus thread contextAli Saidi
2010-06-02ARM: Support table walks in timing mode.Dam Sunwoo
2010-06-02ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, ↵Dam Sunwoo
V2PCWUR, V2PCWUW,...)
2010-06-02ARM: Decode the neon instruction space.Gabe Black
2010-06-02ARM: Add a comment to vfp.cc that explains the asm statements.Gabe Black
2010-06-02ARM: Move some case values out of ##included files.Gabe Black
This will help keep the high level decode together and not have it spread into the subordinate decode stuff. The ##include lines still need to be on a line by themselves, though.
2010-06-02ARM: Combine some redundant cases in one of the data decode functions.Gabe Black
2010-06-02ARM: Add comments to the classes in macromem.hh.Gabe Black
2010-06-02ARM: Move code from vfp.hh to vfp.cc.Gabe Black
2010-06-02ARM: Make some of the trace code more compactAli Saidi
2010-06-02ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.Gabe Black
2010-06-02ARM: Move the ISA "clear" function into isa.cc.Gabe Black
2010-06-02ARM: Get rid of the binary dumping function in utility.hh.Gabe Black
2010-06-02ARM: Get rid of the empty branch.cc.Gabe Black
2010-06-02ARM: Mark some ARM static inst functions as inline.Gabe Black
2010-06-02ARM: Move some predecoder stuff into a .cc file.Gabe Black
--HG-- rename : src/arch/arm/predecoder.hh => src/arch/arm/predecoder.cc
2010-06-02ARM: Decode to specialized conditional/unconditional versions of instructions.Gabe Black
This is to avoid condition code based dependences from effectively serializing instructions when the instruction doesn't actually use them.
2010-06-02ARM: Make sure undefined unconditional ARM instructions decode as such.Gabe Black
2010-06-02ARM: Implement a version of mcr and mrc that works in user mode.Gabe Black
2010-06-02ARM: Hook the misc instructions into the thumb decoder.Gabe Black
2010-06-02ARM: Move some miscellaneous instructions out of the decoder to share with ↵Gabe Black
thumb.
2010-06-02ARM: Treat LDRD in ARM with an odd index as an undefined instruction.Gabe Black
2010-06-02ARM: fix sizes of structs for ARM LinuxAli Saidi
2010-06-02ARM: Fixup native trace support and add some v7/recent stack codeAli Saidi
2010-06-02ARM: Detect a bad offset field for the VFP Ldm/Stm instructions in the decoder.Gabe Black
2010-06-02ARM: Make sure the upc is zeroed when vectoring to a fault.Gabe Black
2010-06-02ARM: Implement the getrusage syscall.Ali Saidi
2010-06-02ARM: Implement the bkpt instruction.Gabe Black
2010-06-02ARM: Make undefined instructions obey predication.Gabe Black
2010-06-02ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.Gabe Black
2010-06-02ARM: Get rid of some of the old FP implementation.Gabe Black
2010-06-02ARM: Some TLB bug fixes.Ali Saidi
2010-06-02ARM: Move Miscreg functions out of isa.hhAli Saidi
2010-06-02ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.Ali Saidi
2010-06-02ARM: SE needs a definition for PageTable::serialize/unserializeAli Saidi