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AgeCommit message (Expand)Author
2017-11-22sparc: Move integer StaticInst base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Move the mem base classes out of the ISA description.Gabe Black
2017-11-22sparc: Move the microop/macroop base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Return debug faults from unimplemented instructions.Gabe Black
2017-11-22sparc: Pull the unimplemented formats out of the ISA description.Gabe Black
2017-11-22sparc: Pull the "Uknown" StaticInst class out of the ISA description.Gabe Black
2017-11-22sparc: Pull most of the Nop format out of the ISA description.Gabe Black
2017-11-22sparc: Pull more StaticInst base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Pull flat static instruction classes out of the ISA.Gabe Black
2017-11-21arch-arm: ArmPMU refactorJose Marinho
2017-11-21arch-arm: Do not increment PMU cycle event in WFI/WFEJose Marinho
2017-11-21arch-arm: Fix MCR/MRC disassembleGiacomo Travaglini
2017-11-21arch-arm: Fix MSR/MRS disassembleGiacomo Travaglini
2017-11-20arch-arm: Ensure counters keep events on checkpoint resumeJose Marinho
2017-11-20sparc: Pull StaticInst base classes out of the ISA description.Gabe Black
2017-11-17sim: Implement load_addr_mask auto-calculationGeoffrey Blake
2017-11-16arch, arm: Print value being ignored on DummyISA writeSean McGoogan
2017-11-15arch-arm: Dsb instruction shouldn't flush the pipelineGiacomo Travaglini
2017-11-15arch-arm: Writes to DCCMVAC shouldn't flush pipelineGiacomo Travaglini
2017-11-15arch-arm: Removing FlushPipe fault, using SquashAfterGiacomo Travaglini
2017-11-15arm: Add support for armv8 CRC32 instructionsGiacomo Travaglini
2017-11-13arch-arm: Interface for the ArmStaticInst intWidth fieldGiacomo Travaglini
2017-11-13arch-arm: Corrected encoding for T32 HVC instructionGiacomo Travaglini
2017-11-10scons: Move Transform and termcap functionality into their own files.Gabe Black
2017-11-09arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1Nikos Nikoleris
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-31x86: Fix VEX instruction decoding.Gabe Black
2017-10-20arch-arm: RBIT instruction using mirroring funcGiacomo Travaglini
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black
2017-10-17arch-arm: Fix inverted 32/64-bit check in GDBBoris Shingarov
2017-10-13arch-arm: Signal an event when executing store exclusivesNikos Nikoleris
2017-10-13mem: Signal the local monitor when clearing the global monitorNikos Nikoleris
2017-09-27arch-x86: fix CondInst decoding for MOV to Control RegistersBjoern A. Zeeb
2017-09-27arch: change panic for Vector traceData to warn_onceBjoern A. Zeeb
2017-09-21alpha: Move some initialization logic from loadState into unserialize.Gabe Black
2017-09-20kvm: arm: Get rid of functions which just wrap the subclasses version.Gabe Black
2017-09-11stats: Move the swpipl function into the Alpha kernel stats.Gabe Black
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-08-30arch-arm: Only increment SW PMU counters on writes to PMSWINCJose Marinho
2017-08-30arch-arm: Add missing override keywords in fault.hhAndreas Sandberg
2017-08-30arch-x86: Add missing override in the X86 TLBAndreas Sandberg
2017-08-30arch-sparc: Add a FaultVals instantiation for VecDisabledAndreas Sandberg
2017-08-30arch-alpha: Add missing overridesAndreas Sandberg
2017-08-28x86: Use the new CondInst format for moves to/from control registers.Gabe Black
2017-08-28x86: Add a "CondInst" format for conditionally decoded instructions.Gabe Black
2017-08-01arch-arm: Use named constants for m5op instructionsAndreas Sandberg
2017-08-01kvm, arm: Switch to the device EQ when accessing ISA devicesAndreas Sandberg
2017-08-01arch-arm: Switch to DTOnly as the default machine typeAndreas Sandberg
2017-07-17sim, x86: Make clone a virtual functionSean Wilson