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AgeCommit message (Expand)Author
2019-11-26arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated ifdefs.Gabe Black
2019-11-25arm: Stop serializing ISA values wihch are cached from the system.Gabe Black
2019-11-25arch-arm: default MIDR for Armv8 ISA processorsAdrian Herrera
2019-11-25arch-riscv: Fix disassembling for atomic instructionsIan Jiang
2019-11-25arch-riscv: Fix disassembling of operand list for compressed instructionsIan Jiang
2019-11-25arch-riscv: Fix disassembling of immediate for U-type instructionsIan Jiang
2019-11-22arch-riscv: Fix bug in serialize and unserialize of InterrutpsIanJiangICT
2019-11-20base,tests: Expanded GTests for addr_range.hhBrandon Potter
2019-11-18arch: Get rid of the (Big|Little)EndianGuest namespaces.Gabe Black
2019-11-18arch: Make and use endian specific versions of the mem helpers.Gabe Black
2019-11-18arch-arm: R/W interface to AArch32 HCR2 misc regAdrian Herrera
2019-11-18arch-arm: Fix short descriptors cacheability during table walksGiacomo Travaglini
2019-11-18arch-arm: Fix long descriptors cacheability during table walksGiacomo Travaglini
2019-11-14arch-arm: Refactor code to check if gic is GicV2Chun-Chen TK Hsu
2019-11-14config: Add fastmodel cluster in fs_bigLITTLE.pyChun-Chen TK Hsu
2019-11-13arm: Replace most htog and gtoh with htole and letoh.Gabe Black
2019-11-13arch-arm: fix routeToHyp for AArch64 in faultsAdrian Herrera
2019-11-13fastmodel: Implement reading vector registers with readVecReg.Gabe Black
2019-11-11arch-arm: Fix TarmacParser handling of 64bit LD/STGiacomo Travaglini
2019-11-11arch-arm: Provide SVE support to the TarmacTracerGiacomo Travaglini
2019-11-11arch-arm: Provide SVE support to the TarmacParserGiacomo Gabrielli
2019-11-07arm: Set the number of FloatRegs to zero.Gabe Black
2019-11-07power: Replace gtoh and htog with betoh and htobe.Gabe Black
2019-11-07x86: Replace htog and gtoh with htole and letoh.Gabe Black
2019-11-07mips: Replace gtoh and htog with letoh and htole.Gabe Black
2019-11-07sparc: Replace htog and gtoh with htobe and betoh.Gabe Black
2019-11-07fastmodel: Plumb the ITB and DTB through the IRIS thread context.Gabe Black
2019-11-06fastmodel: Implement inst count events in the IRIS thread contexts.Gabe Black
2019-11-06arch-arm: Simplify AMO code generation templatesNikos Nikoleris
2019-11-05arch-arm: Annotate original address in CMOsGiacomo Travaglini
2019-11-02arch,cpu: Move endianness conversion of inst bytes into the ISA.Gabe Black
2019-11-01arch-x86: Fix FLDCW_P and FNSTCW_P to use rip.seanzw
2019-11-01arch-arm: generic method for getting an ArmSystemAdrian Herrera
2019-10-31fastmodel: Add CortexA76x[234] models.Gabe Black
2019-10-31fastmodel: Enable auto bridging and use it to simplify CortexA76x1.Gabe Black
2019-10-31fastmodel: Templatize the xn versions of the CortexA76.Gabe Black
2019-10-31alpha: Convert htog and gtoh to htole and letoh.Gabe Black
2019-10-30arch,sim: Make copyStringArray take an explicit endianness.Gabe Black
2019-10-30arch: Make endianness a property of the OS class syscalls can consume.Gabe Black
2019-10-30fastmodel: Refactor the CortexA76x1 model for MP support.Gabe Black
2019-10-30fastmodel: Helper function to setup FastModels for simulationChun-Chen TK Hsu
2019-10-30sparc: Create a helper functions to install firmware images.Gabe Black
2019-10-25mips,riscv: Get rid of some Alpha cruft in these System classes.Gabe Black
2019-10-25cpu: Get rid of the nextInstEventCount method.Gabe Black
2019-10-25cpu: Get rid of the serviceInstCountEvents method.Gabe Black
2019-10-25fastmodel: Use getCurrentInstCount for totalInsts().Gabe Black
2019-10-25fastmodel: Implement getCurrentInstCount.Gabe Black
2019-10-25cpu: Switch off of the CPU's comInstEventQueue.Gabe Black
2019-10-25cpu: Make the ThreadContext a PCEventScope.Gabe Black
2019-10-25sim: Make the System object a PCEventScope.Gabe Black