| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-08-23 | ARM: Decode neon memory instructions. | Ali Saidi | |
| 2010-08-23 | ARM: Clean up the ISA desc portion of the ARM memory instructions. | Gabe Black | |
| 2010-08-23 | ARM: We don't currently support ThumbEE exceptions, so don't report that we do | Ali Saidi | |
| 2010-08-23 | ARM: Add system for ARM/Linux and bootstrapping | Ali Saidi | |
| 2010-08-23 | ARM: Implement some more misc registers | Ali Saidi | |
| 2010-08-23 | ARM: Fix an un-initialized variable bug | Ali Saidi | |
| 2010-08-23 | Loader: Make the load address mask be a parameter of the system rather than ↵ | Ali Saidi | |
| a constant. This allows one two different OS requirements for the same ISA to be handled. Some OSes are compiled for a virtual address and need to be loaded into physical memory that starts at address 0, while other bare metal tools generate images that start at address 0. | |||
| 2010-08-23 | ARM: Finish the timing translation when taking a fault. | Min Kyu Jeong | |
| 2010-08-23 | ARM: Use a stl queue for the table walker state | Dam Sunwoo | |
| 2010-08-23 | Compiler: Fixes for GCC 4.5. | Ali Saidi | |
| 2010-08-22 | X86: Get rid of unused file arguments.hh. | Gabe Black | |
| 2010-08-22 | SPARC: Fix some style issues in utility.hh. | Gabe Black | |
| 2010-08-22 | X86: Get rid of the unused getAllocator on the python base microop class. | Gabe Black | |
| This function is always overridden, and doesn't actually have the right signature. | |||
| 2010-08-17 | x86: minor checkpointing bug fixes | Steve Reinhardt | |
| 2010-08-17 | sim: revamp unserialization procedure | Steve Reinhardt | |
| Replace direct call to unserialize() on each SimObject with a pair of calls for better control over initialization in both ckpt and non-ckpt cases. If restoring from a checkpoint, loadState(ckpt) is called on each SimObject. The default implementation simply calls unserialize() if there is a corresponding checkpoint section, so we get backward compatibility for existing objects. However, objects can override loadState() to get other behaviors, e.g., doing other programmed initializations after unserialize(), or complaining if no checkpoint section is found. (Note that the default warning for a missing checkpoint section is now gone.) If not restoring from a checkpoint, we call the new initState() method on each SimObject instead. This provides a hook for state initializations that are only required when *not* restoring from a checkpoint. Given this new framework, do some cleanup of LiveProcess subclasses and X86System, which were (in some cases) emulating initState() behavior in startup via a local flag or (in other cases) erroneously doing initializations in startup() that clobbered state loaded earlier by unserialize(). | |||
| 2010-08-13 | CPU: Tidy up endianness handling for mmapped "IPR"s. | Gabe Black | |
| 2010-07-22 | Power: The condition register should be set or cleared upon a system call | Timothy M. Jones | |
| return to indicate success or failure. | |||
| 2010-07-22 | Power: Provide a utility function to copy registers from one thread context | Timothy M. Jones | |
| to another in the Power ISA. | |||
| 2010-07-21 | Fix x86 XCHG macro-op to use locked micro-ops for all memory accesses | Tushar Krishna | |
| 2010-07-15 | ARM: Make an SRS instruction with a bad mode cause an undefined instruction ↵ | Gabe Black | |
| fault. | |||
| 2010-07-13 | ARM: Adjust the FP_Base_DepTag to be larger than the largest int reg index. | Gabe Black | |
| 2010-06-25 | X86: Fix div2 flag calculation. | Gabe Black | |
| 2010-06-15 | stats: only consider a formula initialized if there is a formula | Nathan Binkert | |
| 2010-06-14 | stats: get rid of the never-really-used event stuff | Nathan Binkert | |
| 2010-06-03 | More minor gdb-related cleanup. | Steve Reinhardt | |
| Found several more stale includes and forward decls. | |||
| 2010-06-03 | ARM: Fix issue with m5.fast and ARM | Ali Saidi | |
| 2010-06-02 | ARM: Fix SPEC2000 benchmarks in SE mode. With this patch all | Ali Saidi | |
| Spec2k benchmarks seem to run with atomic or timing mode simple CPUs. Fixed up some constants, handling of 64 bit arguments, and marked a few more syscalls ignoreFunc. | |||
| 2010-06-02 | ARM: Fix IT state not updating when an instruction memory instruction faults. | Min Kyu Jeong | |
| 2010-06-02 | ARM: Allow multiple outstanding TLB walks to queue. | Dam Sunwoo | |
| 2010-06-02 | ARM TLB: Fix bug in memAttrs getting a bogus thread context | Ali Saidi | |
| 2010-06-02 | ARM: Support table walks in timing mode. | Dam Sunwoo | |
| 2010-06-02 | ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, ↵ | Dam Sunwoo | |
| V2PCWUR, V2PCWUW,...) | |||
| 2010-06-02 | ARM: Decode the neon instruction space. | Gabe Black | |
| 2010-06-02 | ARM: Add a comment to vfp.cc that explains the asm statements. | Gabe Black | |
| 2010-06-02 | ARM: Move some case values out of ##included files. | Gabe Black | |
| This will help keep the high level decode together and not have it spread into the subordinate decode stuff. The ##include lines still need to be on a line by themselves, though. | |||
| 2010-06-02 | ARM: Combine some redundant cases in one of the data decode functions. | Gabe Black | |
| 2010-06-02 | ARM: Add comments to the classes in macromem.hh. | Gabe Black | |
| 2010-06-02 | ARM: Move code from vfp.hh to vfp.cc. | Gabe Black | |
| 2010-06-02 | ARM: Make some of the trace code more compact | Ali Saidi | |
| 2010-06-02 | ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file. | Gabe Black | |
| 2010-06-02 | ARM: Move the ISA "clear" function into isa.cc. | Gabe Black | |
| 2010-06-02 | ARM: Get rid of the binary dumping function in utility.hh. | Gabe Black | |
| 2010-06-02 | ARM: Get rid of the empty branch.cc. | Gabe Black | |
| 2010-06-02 | ARM: Mark some ARM static inst functions as inline. | Gabe Black | |
| 2010-06-02 | ARM: Move some predecoder stuff into a .cc file. | Gabe Black | |
| --HG-- rename : src/arch/arm/predecoder.hh => src/arch/arm/predecoder.cc | |||
| 2010-06-02 | ARM: Decode to specialized conditional/unconditional versions of instructions. | Gabe Black | |
| This is to avoid condition code based dependences from effectively serializing instructions when the instruction doesn't actually use them. | |||
| 2010-06-02 | ARM: Make sure undefined unconditional ARM instructions decode as such. | Gabe Black | |
| 2010-06-02 | ARM: Implement a version of mcr and mrc that works in user mode. | Gabe Black | |
| 2010-06-02 | ARM: Hook the misc instructions into the thumb decoder. | Gabe Black | |
| 2010-06-02 | ARM: Move some miscellaneous instructions out of the decoder to share with ↵ | Gabe Black | |
| thumb. | |||
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