gem5 - gem5

Age	Commit message (Collapse)	Author
2013-09-04	arch: Resurrect the NOISA build target and rename it NULL	Andreas Hansson
	This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. --HG-- rename : build_opts/NOISA => build_opts/NULL rename : src/arch/noisa/SConsopts => src/arch/null/SConsopts rename : src/arch/noisa/cpu_dummy.hh => src/arch/null/cpu_dummy.hh rename : src/cpu/intr_control.cc => src/cpu/intr_control_noisa.cc
2013-02-15	loader: add a flattened device tree blob (dtb) object	Anthony Gutierrez
	this adds a dtb_object so the loader can load in the dtb file for linux/android ARM kernels.
2013-02-10	ruby: replace Time with Cycles in Message class	Nilay Vaish
	Concomitant changes are being committed as well, including the io operator<< for the Cycles class.
2012-09-19	AddrRange: Simplify Range by removing stream input/output	Andreas Hansson
	This patch simplifies the Range class in preparation for the introduction of a more specific AddrRange class that allows interleaving/striping. The only place where the parsing was used was in the unit test.
2012-06-05	sim: Remove FastAlloc	Ali Saidi
	While FastAlloc provides a small performance increase (~1.5%) over regular malloc it isn't thread safe. After removing FastAlloc and using tcmalloc I've seen a performance increase of 12% over libc malloc when running twolf for ARM.
2011-06-02	scons: rename TraceFlags to DebugFlags	Nathan Binkert

2011-05-12	stats: delete mysql support	Nathan Binkert
	we can add it back within python in some future changeset
2011-05-12	stats: move code that loops over all stats into python	Nathan Binkert

2011-02-11	VNC: Add VNC server to M5	Ali Saidi

2011-01-03	Delete unused files from src/base directory.	Steve Reinhardt

2010-11-19	SCons: Support building without an ISA	Ali Saidi

2010-06-14	stats: get rid of the never-really-used event stuff	Nathan Binkert

2010-04-18	callback: Make helper functions that create callback objects for you	Nathan Binkert
	clean up callback stuff a little bit while we're at it.
2009-02-26	CPA: Add new object for gathering critical path annotations.	Ali Saidi

2009-02-23	stats: get rid of the convoluted 'database' code.	Nathan Binkert
	Just use the stuff directly and things ought to be more clear
2009-02-23	debug: Move debug_break into src/base	Nathan Binkert

2009-01-19	tracing: Add help strings for some of the trace flags	Nathan Binkert

2008-09-19	atomicio: provide atomic read and write functions.	Nathan Binkert
	These functions keep trying to read and write until all data has been transferred, or an error occurrs. In the case where an end of file hasn't been reached, but all of the bytes have not been read/written, try again. On EINTR, try again.
2007-11-13	Add in files from merge-bare-iron, get them compiling in FS and SE mode	Korey Sewell
	--HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-10-31	Traceflags: Add SCons function to created a traceflag instead of having one ↵	Ali Saidi
	file with them all. --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-31	Base: Rework the way M5 provides and creates random numbers.	Ali Saidi
	--HG-- extra : convert_revision : 10ec3484647b3acb8e821f8520f97d535e41e861
2007-06-09	only compile fenv.c if we're using fenv	Nathan Binkert
	--HG-- extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
2007-04-21	create base/fenv.c to standerdize fenv across platforms. It's a c file and ↵	Ali Saidi
	not a cpp file because c99 (which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment. src/arch/alpha/isa/fp.isa: src/arch/sparc/isa/formats/basic.isa: use m5_fesetround()/m5_fegetround() istead of fenv interface directly src/arch/sparc/isa/includes.isa: use base/fenv instead of fenv directly src/base/SConscript: add fenv to sconscript src/base/fenv.hh: src/base/random.cc: m5 implementation to standerdize fenv across platforms. --HG-- extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-12	Completely re-work how the scons framework incorporates swig	Nathan Binkert
	and python code into m5 to allow swig an python code to easily added by any SConscript instead of just the one in src/python. This provides SwigSource and PySource for adding new files to m5 (similar to Source for C++). Also provides SimObject for including files that contain SimObject information and build the m5.objects __init__.py file. --HG-- extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
2007-03-26	Instead of creating a new python process to run traceflags.py,	Nathan Binkert
	just directly exec the file and generate the flags --HG-- extra : convert_revision : d648ca7348404ded5337db327adafccbd2ae40c8
2007-03-10	Rework the way SCons recurses into subdirectories, making it	Nathan Binkert
	automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30