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2017-10-31vnc: Default image writer type set to AutoGiacomo Travaglini
This commit modifies the default behaviour of the vnc frame dumping process: rather than using 'Bitmap' as a default parameter value, it is using 'Auto'. Auto parameter is letting gem5 to choose the most efficient image format among the available ones. Change-Id: I3c8e2b5a34a5925d24892880ac362dfe38de36e3 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5182 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-10-31base: Introducing utility for writing raw data in png formatGiacomo Travaglini
Originally it was possible to use a Bitmap writer class for dumping a framebuffer snapshot in a .bmp file. This patch enables you to choose another format. In particular it implements the writing of PNG Images using libpng library. The latter has to be already installed in your machine, otherwise gem5 will default to the Bitmap format. This configurable writer has been introduced in the VNC frame dumping mechanism, which is storing changed frame buffers from the VNC server Change-Id: Id7e5763c82235f1ce90381c8486b85a7cce734ce Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5181 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-10-30base: Fix forcing loopback only binding for listeners.Gabe Black
Despite online documentation, the type used for sin_addr.s_addr is not actually an unsigned long, it is an in_addr_t. When an unsigned long is a 64 bit value, the endian conversion moves the relevant bits of the 32 bit in_addr_t to positions which are truncated away. This forces the value to 0 which means to bind to any interface, the opposite of the intended effect. Change-Id: I53c63dea6bd88144dfef1a9a49b478fab30a8ba2 Reviewed-on: https://gem5-review.googlesource.com/5301 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-10-20base: Function for mirroring bits in variable length wordGiacomo Travaglini
This patch introduces a high-speed template function for mirroring the bits (MSB=>LSB) in a variable length word. The function is achieving high performances since it is using a look-up table. Change-Id: Ib0d0480e68d902f25655f74d243de305103eff75 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5261 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-10-20base: Defining make_unique for C++11Giacomo Travaglini
std::make_unique is not available for C++11 compilers, and it has been introduced only in C++14. Since gem5 is not officially supporting the latter at the moment, this patch allows to use it in gem5 if including base/compiler.hh. If compiled under C++14, std::make_unique will be used instead. Change-Id: Ibf1897fad0a1eb1cb0c683cc25170feaa6841997 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5201 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-08-02base: Give more information when setting up asynchronous IO fails.Gabe Black
When asynchronous IO fails, gem5 currently just says it failed and quits, and doesn't give any more information about which step failed, or what specifically about it failed. This change adds two helpers which will attempt the fcntl, check for error conditions, and in the event of a failure, include a message describing the error code and what the arguments to fcntl were. Change-Id: I316478172ab2aefd3788279dbc12744791385cd5 Reviewed-on: https://gem5-review.googlesource.com/4320 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2017-07-12sim, gdb: Refactor some Event subclasses into lambdasSean Wilson
Change-Id: If3e4329204f27eda96b50ec6ac279ebc6ef23d99 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3921 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-12cpu, sim: Add param to force CPUs to wait for GDBJose Marinho
By setting the BaseCPU parameter wait_for_dbg_connection, the GDB server blocks during initialisation waiting for the remote debugger to connect before starting the simulated CPU. Change-Id: I4d62c68ce9adf69344bccbb44f66e30b33715a1c [ Update info message to include remote GDB port, rename param. ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3963 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-06-13ruby: Add support for address ranges in the directoryNikos Nikoleris
Previously the directory covered a flat address range that always started from address 0. This change adds a vector of address ranges with interleaving and hashing that each directory keeps track of and the necessary flexibility to support systems with non continuous memory ranges. Change-Id: I6ea1c629bdf4c5137b7d9c89dbaf6c826adfd977 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2903 Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-06-03base: misc: Include cstdlib in base/misc.hh.Gabe Black
Some of the macros, notably panic, uses exit(). Callers shouldn't have to know that or have coincidentally included cstdlib, the provider of exit, themselves. Change-Id: I634602ed1795dcc8897b4bddb1167c96763acc18 Reviewed-on: https://gem5-review.googlesource.com/3601 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
Compiling gem5 with recent version of clang (4 and 5) triggers warnings that are treated as errors: * Global templatized static functions result in a warning if they are not used. These should either be declared as static inline or without the static identifier to avoid the warning. * Some templatized classes contain static variables. The instantiated versions of these variables / templates need to be explicitly declared to avoid a compiler warning. Change-Id: Ie8261144836e94ebab7ea04ccccb90927672c257 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3420 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-18base: Refactor the GDB code.Gabe Black
The new version modularizes the implementation of the various commands, gets rid of dynamic allocation of the register cache, fixes some small style problems, and uses exceptions to simplify error handling internal to the GDB stub. Change-Id: Iff3548373ce4adfb99106a810f5713b769df89b2 Reviewed-on: https://gem5-review.googlesource.com/3280 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Boris Shingarov <shingarov@gmail.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-12base: Make the VNC server more resilient.Gabe Black
If the client does something bad, don't kill the whole simulation, just complain, drop the client and keep going. Change-Id: I824f2d121e2fe03cdf4323a25c192b68e0370acc Reviewed-on: https://gem5-review.googlesource.com/3200 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-12misc: Make the remote GDB stub more resilient to bad connections.Gabe Black
Currently, if the remote gdb stub fails to read a byte from an incoming packet because the connection has been dropped, the read call will return anyway and the calling code will have no way to know something bad happened. It might reattempt the read over and over again waiting for some particular byte, doomed to never make forward progress. This change modifies the remote GDB code so that if a read or write call fails, it will instead detach from the debugger and continue. Before this change, When simulating a port scan, ie connecting to the debugger port and then immediately dropping the connection using this command: nc -v -n -z -w 1 127.0.0.1 7000 gem5 would enter the previously described death spiral. After it, gem5 detaches from the bad connection and resumes execution. Subsequently attaching with gdb was successful. This code is written in a C centric style, and would benefit from some refactoring. Change-Id: Ie3c0bb35b9cfe3671d0f731e3907548bae0d292f Reviewed-on: https://gem5-review.googlesource.com/3180 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-09base: Teach the socket listeners how to bind to the loopback.Gabe Black
The loopback device will allow access to various services like remote GDB debugging, connecting to the terminal, etc., without letting external agents like port scanners connect and disrupting the simulation. Change-Id: I76dccbf152fa278ae9f342b25f7e345a1329fbe4 Reviewed-on: https://gem5-review.googlesource.com/3080 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-02base, sim, dev: Remove SWIGAndreas Sandberg
Remove SWIG guards and SWIG-specific C++ code. Change-Id: Icaad6720513b6f48153727ef3f70e0dba0df4bee Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2921 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
2017-04-03dev: Align BAR0 size to power of 2 for VirtIO devicesSascha Bischoff
When setting the size of a PCI BAR, the kernel only supports powers of two (as per the PCI spec). Previously, the size was incorrectly read by the kernel, and the address ranges assigned to the PCI devices could overlap, resulting in gem5 crashes. We now round up to the next power of two. Kudos to Sergei Trofimov who helped to debug this issue! Change-Id: I54ca399b62ea07c09d4cd989b17dfa670e841bbe Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-by: Sergei Trofimov <sergei.trofimov@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2580 Reviewed-by: Paul Rosenfeld <prosenfeld@micron.com>
2017-03-09style: Correct some style issuesBrandon Potter
This changeset fixes line alignment issues, spacing, spelling, etc. for files that are used during SE Mode. Change-Id: Ie61b8d0eb4ebb5af554d72f1297808027833616e Reviewed-on: https://gem5-review.googlesource.com/2264 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>
2017-03-09misc: add missing copyright/author information in previous commitPierre-Yves Péneau
See a06a46f and a854373. Change-Id: Id66427db22b7d7764c218b9cd78d95db929f4127 Signed-off-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-on: https://gem5-review.googlesource.com/2224 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-02-27base: Refactor logging to make log level selection cleanerAndreas Sandberg
It's currently possible to change the log level in gem5 by tweaking a set of global variables. These variables are currently exposed to Python using SWIG. This mechanism is far from ideal for two reasons: First, changing the log level requires that the Python world enables or disables individual levels. Ideally, this should be a single call where a log level is selected. Second, exporting global variables is poorly supported by most Python frameworks. SWIG puts variables in their own namespace and PyBind doesn't seem to support it at all. This changeset refactors the logging code to create a more abstract interface. Each log level is associated with an instance of a Logger class. This class contains common functionality, an enable flag, and a verbose flag. Available LogLevels are described by the LogLevel class. Lower log levels are used for more critical messages (PANIC being level 0) and higher levels for less critical messages. The highest log level that is printed is controlled by calling Logger:setLevel(). Change-Id: I31e44299d242d953197a8e62679250c91d6ef776 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-23base: fix small memory leak in the ELF loaderBrandon Potter
2017-02-15mem, stats: fix typos in CommMonitor and StatsPierre-Yves Péneau
Signed-off-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed at http://reviews.gem5.org/r/3802/
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
Used cppclean to help identify useless includes and removed them. This involved erroneously included headers, but also cases where forward declarations could have been used rather than a full include.
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-11-09base: remove header file to prevent a macro name collisionBrandon Potter
2016-11-30arch: [Patch 1/5] Added RISC-V base instruction set RV64IAlec Roelke
First of five patches adding RISC-V to GEM5. This patch introduces the base 64-bit ISA (RV64I) in src/arch/riscv for use with syscall emulation. The multiply, floating point, and atomic memory instructions will be added in additional patches, as well as support for more detailed CPU models. The loader is also modified to be able to parse RISC-V ELF files, and a "Hello world\!" example for RISC-V is added to test-progs. Patch 2 will implement the multiply extension, RV64M; patch 3 will implement the floating point (single- and double-precision) extensions, RV64FD; patch 4 will implement the atomic memory instructions, RV64A, and patch 5 will add support for timing, minor, and detailed CPU models that is missing from the first four patches (such as handling locked memory). [Removed several unused parameters and imports from RiscvInterrupts.py, RiscvISA.py, and RiscvSystem.py.] [Fixed copyright information in RISC-V files copied from elsewhere that had ARM licenses attached.] [Reorganized instruction definitions in decoder.isa so that they are sorted by opcode in preparation for the addition of ISA extensions M, A, F, D.] [Fixed formatting of several files, removed some variables and instructions that were missed when moving them to other patches, fixed RISC-V Foundation copyright attribution, and fixed history of files copied from other architectures using hg copy.] [Fixed indentation of switch cases in isa.cc.] [Reorganized syscall descriptions in linux/process.cc to remove large number of repeated unimplemented system calls and added implmementations to functions that have received them since it process.cc was first created.] [Fixed spacing for some copyright attributions.] [Replaced the rest of the file copies using hg copy.] [Fixed style check errors and corrected unaligned memory accesses.] [Fix some minor formatting mistakes.] Signed-off by: Alec Roelke Signed-off by: Jason Lowe-Power <jason@lowepower.com>
2016-10-14stats: Add more information to uninitialized errorJason Lowe-Power
ClockedObject was changed to require its regStats() to be called from every child class. If you forget to do this, the error was indecipherable. This patch makes the error more clear.
2016-10-06ruby: garnet2.0Tushar Krishna
Revamped version of garnet with more optimized single-cycle routers, more configurability, and cleaner code.
2016-10-04misc: Adds a warning in case gdb is attached multiple timesAlexandru Dutu
Instead of scheduling another event, this patch adds a warning in case gdb is attached multiple times and the first attachement event has not been processed yet.
2016-10-04sim: Add a checkpoint function to test for entriesAndreas Sandberg
When loading a checkpoint, it's sometimes desirable to be able to test whether an entry within a secion exists. This is currently done automatically in the UNSERIALIZE_OPT_SCALAR macro, but it isn't possible to do for arrays, containers, or enums. Instead of adding even more macros, add a helper function (CheckpointIn::entryExists()) that tests for the presence of an entry. Change-Id: I4b4646b03276b889fd3916efefff3bd552317dbc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-07-21base: Add total() to Vector2D statDavid Guillen Fandos
This patch adds a total() function to the Vector2D stat type. Similar to other stats such as Scalar or Vector it is useful to be able to read the total for a given stat.
2016-07-11base: Fix inverted check in ELF .text size warningAndreas Sandberg
2016-07-11base: Convert ELF .text size check assertion to a warningAndreas Sandberg
The ELF loader currently has an assertion that checks if the size of a loaded .text secion is non-zero. This is useful in the general case as an empty text section normally indicates that there is something strange with the ELF file. However, asserting isn't very useful. This changeset converts the assert into a warning that tells the user that something strange is happening. Change-Id: I313e17847b50a0eca00f6bd00a54c610d626c0f0 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-06-20base: Fix multiple names to one address bug in SymbolTableAndreas Sandberg
The SymbolTable class currently assumes that at most one symbol can point to a given address. If multiple symbols point to the same address, only the first one gets added to the internal symbol table since there is already a match in the address table. This changeset converts the address table from a map into a multimap to be able to handle cases where an address maps to multiple symbols. Additionally, the insert method is changed to not fail if there is a match in the address table. Change-Id: I6b4f1d5560c21e49a4af33220efb2a8302961768 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
2016-04-27dev: Fix incorrect terminal backlog handlingAndreas Sandberg
The Terminal device currently uses the peek functionality in gem5's circular buffer implementation to send existing buffered content on the terminal when a new client attaches. This functionallity is however not implemented correctly and re-sends the same block multiple time. Add the required functionality to peek with an offset into the circular buffer and change the Terminal::accept() implementation to send the buffered contents. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Radhika Jagtap <radhika.jagtap@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-03-17base: add symbol support for dynamic librariesBrandon Potter
Libraries are loaded into the process address space using the mmap system call. Conveniently, this happens to be a good time to update the process symbol table with the library's incoming symbols so we handle the table update from within the system call. This works just like an application's normal symbols. The only difference between a dynamic library and a main executable is when the symbol table update occurs. The symbol table update for an executable happens at program load time and is finished before the process ever begins executing. Since dynamic linking happens at runtime, the symbol loading happens after the library is first loaded into the process address space. The library binary is examined at this time for a symbol section and that section is parsed for symbol types with specific bindings (global, local, weak). Subsequently, these symbols are added to the table and are available for use by gem5 for things like trace generation. Checkpointing should work just as it did previously. The address space (and therefore the library) will be recorded and the symbol table will be entirely recorded. (It's not possible to do anything clever like checkpoint a program and then load the program back with different libraries with LD_LIBRARY_PATH, because the library becomes part of the address space after being loaded.)
2016-03-17base: style cleanup for ObjectFile and ElfObjectBrandon Potter
2016-03-17base: support dynamic loading of Linux ELF objects in SE modeBrandon Potter
2015-11-27base: Add support for changing output directoriesAndreas Sandberg
This changeset adds support for changing the simulator output directory. This can be useful when the simulation goes through several stages (e.g., a warming phase, a simulation phase, and a verification phase) since it allows the output from each stage to be located in a different directory. Relocation is done by calling core.setOutputDir() from Python or simout.setOutputDirectory() from C++. This change affects several parts of the design of the gem5's output subsystem. First, files returned by an OutputDirectory instance (e.g., simout) are of the type OutputStream instead of a std::ostream. This allows us to do some more book keeping and control re-opening of files when the output directory is changed. Second, new subdirectories are OutputDirectory instances, which should be used to create files in that sub-directory. Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se> [sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version] Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-02-29base: support gzip-compressed object filesCurtis Dunham
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-control -a'.
2016-02-06style: remove trailing whitespaceSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-white -a'.
2016-01-19* * *Tony Gutierrez
mem: support for gpu-style RMWs in ruby This patch adds support for GPU-style read-modify-write (RMW) operations in ruby. Such atomic operations are traditionally executed at the memory controller (instead of through an L1 cache using cache-line locking). Currently, this patch works by propogating operation functors through the memory system.
2016-01-11scons: Enable -Wextra by defaultAndreas Hansson
Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but they are all trivial.
2016-01-11ext: Replace gzstream with iostream3 from zlib to avoid LGPLAndreas Hansson
This patch replaces the gzstream zlib wrapper with the iostream3 wrapper provided as part of zlib contributions. The main reason for the switch is to avoid including LGPL in the default gem5 build. iostream3 is provided under a more permissive license: The code is provided "as is", with the permission to use, copy, modify, distribute and sell it for any purpose without fee.
2015-12-18arm: remote GDB: rationalize structure of register offsetsBoris Shingarov
Currently, the wire format of register values in g- and G-packets is modelled using a union of uint8/16/32/64 arrays. The offset positions of each register are expressed as a "register count" scaled according to the width of the register in question. This results in counter- intuitive and error-prone "register count arithmetic", and some formats would even be altogether unrepresentable in such model, e.g. a 64-bit register following a 32-bit one would have a fractional index in the regs64 array. Another difficulty is that the array is allocated before the actual architecture of the workload is known (and therefore before the correct size for the array can be calculated). With this patch I propose a simpler mechanism for expressing the register set structure. In the new code, GdbRegCache is an abstract class; its subclasses contain straightforward structs reflecting the register representation. The determination whether to use e.g. the AArch32 vs. AArch64 register set (or SPARCv8 vs SPARCv9, etc.) is made by polymorphically dispatching getregs() to the concrete subclass. The subclass is not instantiated until it is needed for actual g-/G-packet processing, when the mode is already known. This patch is not meant to be merged in on its own, because it changes the contract between src/base/remote_gdb.* and src/arch/*/remote_gdb.*, so as it stands right now, it would break the other architectures. In this patch only the base and the ARM code are provided for review; once we agree on the structure, I will provide src/arch/*/remote_gdb.* for the other architectures; those patches could then be merged in together. Review Request: http://reviews.gem5.org/r/3207/ Pushed by Joel Hestness <jthestness@gmail.com>
2015-12-10dev: Move network devices to src/dev/net/Andreas Sandberg
--HG-- rename : src/dev/Ethernet.py => src/dev/net/Ethernet.py rename : src/dev/etherbus.cc => src/dev/net/etherbus.cc rename : src/dev/etherbus.hh => src/dev/net/etherbus.hh rename : src/dev/etherdevice.cc => src/dev/net/etherdevice.cc rename : src/dev/etherdevice.hh => src/dev/net/etherdevice.hh rename : src/dev/etherdump.cc => src/dev/net/etherdump.cc rename : src/dev/etherdump.hh => src/dev/net/etherdump.hh rename : src/dev/etherint.cc => src/dev/net/etherint.cc rename : src/dev/etherint.hh => src/dev/net/etherint.hh rename : src/dev/etherlink.cc => src/dev/net/etherlink.cc rename : src/dev/etherlink.hh => src/dev/net/etherlink.hh rename : src/dev/etherobject.hh => src/dev/net/etherobject.hh rename : src/dev/etherpkt.cc => src/dev/net/etherpkt.cc rename : src/dev/etherpkt.hh => src/dev/net/etherpkt.hh rename : src/dev/ethertap.cc => src/dev/net/ethertap.cc rename : src/dev/ethertap.hh => src/dev/net/ethertap.hh rename : src/dev/i8254xGBe.cc => src/dev/net/i8254xGBe.cc rename : src/dev/i8254xGBe.hh => src/dev/net/i8254xGBe.hh rename : src/dev/i8254xGBe_defs.hh => src/dev/net/i8254xGBe_defs.hh rename : src/dev/multi_etherlink.cc => src/dev/net/multi_etherlink.cc rename : src/dev/multi_etherlink.hh => src/dev/net/multi_etherlink.hh rename : src/dev/multi_iface.cc => src/dev/net/multi_iface.cc rename : src/dev/multi_iface.hh => src/dev/net/multi_iface.hh rename : src/dev/multi_packet.cc => src/dev/net/multi_packet.cc rename : src/dev/multi_packet.hh => src/dev/net/multi_packet.hh rename : src/dev/ns_gige.cc => src/dev/net/ns_gige.cc rename : src/dev/ns_gige.hh => src/dev/net/ns_gige.hh rename : src/dev/ns_gige_reg.h => src/dev/net/ns_gige_reg.h rename : src/dev/pktfifo.cc => src/dev/net/pktfifo.cc rename : src/dev/pktfifo.hh => src/dev/net/pktfifo.hh rename : src/dev/sinic.cc => src/dev/net/sinic.cc rename : src/dev/sinic.hh => src/dev/net/sinic.hh rename : src/dev/sinicreg.hh => src/dev/net/sinicreg.hh rename : src/dev/tcp_iface.cc => src/dev/net/tcp_iface.cc rename : src/dev/tcp_iface.hh => src/dev/net/tcp_iface.hh
2015-11-05sim: Disable gzip compression for writefile pseudo instructionSascha Bischoff
The writefile pseudo instruction uses OutputDirectory::create and OutputDirectory::openFile to create the output files. However, by default these will check the file extention for .gz, and create a gzip compressed stream if the file ending matches. When writing out files, we want to write them out exactly as they are in the guest simulation, and never want to compress them with gzio. Additionally, this causes m5 writefile to fail when checking the error flags for the output steam. With this patch we add an additional no_gz argument to OutputDirectory::create and OutputDirectory::openFile which allows us to override the gzip compression. Therefore, for m5 writefile we disable the filename check, and always create a standard ostream.
2015-12-04sim: Add support for generating back traces on errorsAndreas Sandberg
Add functionality to generate a back trace if gem5 crashes (SIGABRT or SIGSEGV). The current implementation uses glibc's stack traversal support if available and stubs out the call to print_backtrace() otherwise.
2015-11-06misc: Appease clang static analyzerAndreas Hansson
A few minor fixes to issues identified by the clang static analyzer.