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BaseCPU.py
Age
Commit message (
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Author
2009-04-08
tlb: More fixing of unified TLB
Nathan Binkert
2009-04-08
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Gabe Black
2009-01-30
Config: Cause a fatal() when a parameter without a default value isn't set(FS...
Ali Saidi
2008-12-17
Make Alpha pseudo-insts available from SE mode.
Steve Reinhardt
2008-11-02
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
Lisa Hsu
2008-10-12
X86: Fix the ordering of special physical address ranges.
Gabe Black
2008-10-12
X86: Make APICs communicate through the memory system.
Gabe Black
2008-10-12
X86: Make the local APIC accessible through the memory system directly, and m...
Gabe Black
2008-10-12
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...
Gabe Black
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2008-02-05
Add base ARM code to M5
Stephen Hines
2007-11-21
imported patch pagewalker.patch
Gabe Black
2007-11-13
Add in files from merge-bare-iron, get them compiling in FS and SE mode
Korey Sewell
2007-08-26
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
Gabe Black
2007-08-08
Added fastmem option.
Vincentius Robby
2007-07-28
Turn the instruction tracing code into pluggable sim objects.
Gabe Black
2007-05-27
Move SimObject python files alongside the C++ and fix
Nathan Binkert