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is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
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base.cc
Age
Commit message (
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Author
2008-10-21
style: Use the correct m5 style for things relating to interrupts.
Nathan Binkert
2008-10-12
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...
Gabe Black
2008-10-12
CPU: Eliminate the get_vec function.
Gabe Black
2008-10-09
eventq: convert all usage of events to use the new API.
Nathan Binkert
2008-08-18
Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was ...
Richard Strong
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2008-06-15
port: Clean up default port setup and port switchover code.
Nathan Binkert
2008-02-06
Make the Event::description() a const function
Stephen Hines
2007-12-18
Checkpointing: Fix a bug in the simulation script when restoring without stan...
Ali Saidi
2007-11-08
CPU: Add function to explictly compare thread contexts after copying.
Ali Saidi
2007-09-28
Rename cycles() function to ticks()
Ali Saidi
2007-08-30
params: Deprecate old-style constructors; update most SimObject constructors.
Miles Kaufmann
2007-08-04
switching: turn on profiling after a switch if there's an event
Nathan Binkert
2007-07-29
Merge Gabe's changes from head.
Steve Reinhardt
2007-07-29
BsaeCPU: Get rid of some bad DPRINTFs.
Steve Reinhardt
2007-07-28
Turn the instruction tracing code into pluggable sim objects.
Gabe Black
2007-07-26
Merge python and x86 changes with cache branch
Nathan Binkert
2007-07-23
Major changes to how SimObjects are created and initialized. Almost all
Nathan Binkert
2007-06-30
Event descriptions should not end in "event"
Steve Reinhardt
2007-06-20
Removed "adding instead of dividing" trick.
Vincentius Robby
2007-05-20
Add new EventWrapper constructor that takes a Tick value
Steve Reinhardt
2007-03-23
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2007-03-23
Set progress_interval in terms of CPU cycles.
Kevin Lim
2007-03-09
Two fixes:
Kevin Lim
2007-03-03
Implement Niagara I/O interface and rework interrupts
Ali Saidi
2007-02-17
Give the progress event its own priority
Nathan Binkert
2007-01-30
Make SPARC checkpointing work
Ali Saidi
2007-01-26
eliminate cpu checkInterrupts bool, it is redundant and unnecessary.
Lisa Hsu
2007-01-08
the way i understand it, interrupts in m5 is a little bloated. the usage of ...
Lisa Hsu
2006-12-04
More changes to get SPARC fs closer. Now at 1.2M cycles before difference
Ali Saidi
2006-11-14
Make cpu's capable of having a phase shift
Ron Dreslinski
2006-11-06
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-06
Clean up clock phase drift code a bit.
Kevin Lim
2006-11-03
Add a new file which describes an ISA's interrupt handling mechanism. It reco...
Gabe Black
2006-10-06
there are two main thrusts of this changeset.
Lisa Hsu
2006-10-02
Updates to fix merge issues and bring almost everything up to working speed. ...
Kevin Lim
2006-09-30
Merge ktlim@zamp:./local/clean/o3-merge/m5
Kevin Lim
2006-07-10
Fix cpu in full system to match SE.
Ron Dreslinski
2006-07-07
Update cpus to use the getPort function to use a connector object to connect ...
Ron Dreslinski
2006-07-05
Remove sampler and serializer. Now they are handled through C++ interacting ...
Kevin Lim
2006-07-02
Fix default SMT configuration in O3CPU (i.e. fetch policy, workloads/numThreads)
Korey Sewell
2006-07-01
traceflag stuff
Korey Sewell
2006-06-29
Various fixes for the CPU models to support the features that have been moved...
Kevin Lim
2006-06-09
Merge vm1.(none):/home/stever/bk/newmem
Steve Reinhardt
2006-06-09
Move main control from C++ into Python.
Steve Reinhardt
2006-06-06
Change ExecContext to ThreadContext. This is being renamed to differentiate ...
Kevin Lim
2006-06-02
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-06-02
Fixes to get compiling to work. This is mainly fixing up some includes; chan...
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Merge ktlim@zizzer:/bk/m5
Kevin Lim
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