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path: root/src/cpu/base.cc
AgeCommit message (Expand)Author
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-02-12cpu: add separate stats for insts/ops both globally and per cpu modelAnthony Gutierrez
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
2012-01-07Merge with the main repository again.Gabe Black
2012-01-07Merge with main repository.Gabe Black
2011-12-01Output: Add hierarchical output support and cleanup existing codebase.Chris Emmons
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-11-01SE/FS: Expose the same methods on the CPUs in SE and FS modes.Gabe Black
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
2011-10-09SE/FS: Build the Interrupt objects in SE mode.Gabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-12-07ARM: Support switchover with hardware table walkersAli Saidi
2009-09-29commit Soumyaroop's bug catch about max_insts_all_threadsLisa Hsu
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-05cpus: fix cpu progress eventKorey Sewell
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
2008-11-05Right now a single thread cpu 1 could get assigned context Id != 1, dependingLisa Hsu
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02Make it so that all thread contexts are registered with the System, even inLisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2008-10-12CPU: Eliminate the get_vec function.Gabe Black
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-08-18Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was ...Richard Strong
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-06-15port: Clean up default port setup and port switchover code.Nathan Binkert
2008-02-06Make the Event::description() a const functionStephen Hines
2007-12-18Checkpointing: Fix a bug in the simulation script when restoring without stan...Ali Saidi
2007-11-08CPU: Add function to explictly compare thread contexts after copying.Ali Saidi
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-04switching: turn on profiling after a switch if there's an eventNathan Binkert
2007-07-29Merge Gabe's changes from head.Steve Reinhardt
2007-07-29BsaeCPU: Get rid of some bad DPRINTFs.Steve Reinhardt
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
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